Age | Commit message (Collapse) | Author |
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a bit more hairy).
deraadt@ ok
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option. Every architecture implements mutexes now.
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device_register() function -- even if it does nothing. reduces the
cpp-based blather different between architectures
idea ok'd by miod; tested on all architectures (except a few miod will
need to cleanup because he has them)
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ok tedu
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ok marco@
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We need to include lock_machdep even on non-MP kernels now for
rw_cas.
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It uses a function pointer to choose between the 386 and 486 versions.
The 386 version is not MP safe, but we're not expecting MP support
for 386 cpus.
miod@ ok (and prodding)
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This could lead to some heavy problems if called from kernel threads
(which is the only way to get past the next test with the kernel
pmap).
From mickey. art@ toby@ ok.
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machines. Instead -- build one solid clean MI version, and thenchange all
the architectures to use it. ok various people, tested on almost all cases.
(it is a 10094 line diff..)
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slightly incorrect and didn't actually do much until a week ago
or so when I fixed it when doing VM_PAGE_MD.
deraadt@, miod@ ok
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by dim@, ok deraadt@ and myself. (miod@ also found it sane).
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that the PTP and the PTE are valid before returning success.
deraadt@ ok, tested by many.
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if it is. This gives a way to recover from "switching to com0" when
there's no serial cable handy.
Bump version numbers.
A similar change will be made to amd64 boot soon.
ok toby@ deraadt@
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geometry in the disklabel when there is a BIOS geometry to provide.
This removes the option to set a disklabel to 'BIOS' geometry via the
'g b' command in the editor.
Makes reported geometry more consistant and moves MD code to MD land
where it should be.
Doc help from jmc@, Feedback from millert@, marco@, weingart@,
kettenis@.
ok deraadt@
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pg_flags, so we actually shave quite a few bytes from the memory
we eat at boot. (a machine with 1GB memory saves 256k).
deraadt@, pedro@, krw@ ok. Lots of testing.
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parings of the Intel Pentium 3 and the ich southbridges. Written by
Stefan Sperling <stsp AT tsp DOT in-berlin DOT de> based on a driver in
NetBSD and sys/arch/i386/pci/ichpcib.c.
Tested my mpf@ among others,
ok tedu
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involving the number of states and not the frequencies of the states,
which can lead to strange distributions of the states over the hw.setperf
range (0-100). Tested by many.
ok canacar, tedu
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paddr_t changing from 32 bits.
From mickey's original PAE work of a year ago
Tested by myself and nick@; ok art@
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than calculating it with vtophys().
From mickey's original PAE work of a year ago
Tested by myself and nick@; ok art@
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cores by the same amount, i.e. if you do hw.setperf=50 both cores will
be scaled to the opearting state corresponing to 50%. Tested by many with
est (mainly on core2duo machines like X60 thinkpads). Only enable est
during GENERIC.MP build no one tested powernow.
ok art@
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From NetBSD, miod@ ok
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From mickey.
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to separate locking, on most modern machines this is not enough
since operations on short types touch other short types that share the
same word in memory.
Merge pg_flags and pqflags again and now use atomic operations to change
the flags. Also bump wire_count to an int and pg_version might go
int as well, just for alignment.
tested by many, many. ok miod@
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Also replace "newfs -O" with "newfs -O 0" now that -O takes an option.
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done until we put them on the freelist and risk them being reused.
If the page is reused before being shot, there's a risk that it's still
in the PDE TLB and speculative execution might use data from it to
load TLBs. If the page isn't zeroed anymore we risk loading bogus
tlbs from it.
Inspired by a similar change in NetBSD.
toby@ ok, tested by many at the hackathon.
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overflow the stack, we run into the symbol table (not critical) instead
of overwriting the page tables.
From mickey, ok art@, ok toby@
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We need to poke the other CPU so that it processes the AST immediately
and doesn't wait for the next interrupt or syscall.
Since IPIs really shouldn't process ASTs, we need to trigger a soft
interrupt on the destination CPU to process the AST. But since we can't
send soft interrupts to other CPUs, we send an IPI, that triggers a soft
interrupt that in turn processes the AST.
Also, this marks the beginning of moving to slightly better IPI mechanism
of short and optimized IPIs instead of the large and complicated IPI
infrastructure we're using now.
tested by many, ok tholo@
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kmem_object) just so that we can remove them, just use pmap_extract
to get the pages to free and simplify a lot of code to not deal with
the list of intrsafe maps, intrsafe objects, etc.
miod@ ok
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Mouse. Currently limited to USB mice.
Adapted from a diff from Gareth <garf@loveandnature.co.za> on tech@
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