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have one or the other option, we won't get said kernel entry
point. Ok oga@
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unwanted matching logic.
ok oga@ deraadt@ miod@
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OK deraadt@, kettenis@
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when we pass the main PCI I/O extents to the secondary bus of subtractive
decode brigdes.
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amas defaults to disabled on both amd64 and i386.
"Go for it!" kettenis@
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based on the same change in amd64.
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can only address the first 64K but BARs can contain garbage and addresses
beyond the end of the extent would cause a panic.
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by using the pci resource accounting extents.
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landisk, and the sparc implementation is obviously wrong. That's where I
stopped looking, so who knows what else was broken. A simple comparison of
the existing mtx_enter with the new mtx_enter_try would have told anybody.
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using this soon(ish). Ok oga@, sorta yes kettenis@.
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by Wim Van Sebroeck. Commented out in GENERIC but Heriberto Molina is
getting devices for developers so we can maintain this more easily.
Many thanks to both!
Man page will follow later.
``don't hold back for man page'' deraadt
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shrinks the output of installboot by a few lines.
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Saves every damned driver calling bzero(), and continues the M_ZERO,
PR_ZERO symmetry.
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``please commit'' deraadt
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always increment uvmexp.softs while inside the lock.
While i'm here, make alpha's dispatch loop look like the rest.
"sure" miod@
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in sysctl hw.ncpufound; ok miod kettenis
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simplelocks + splhigh().
First part of making it possible to make mpsafe softinterrupts.
"oh yes, definitely" miod@
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when we setmapsize it's not zero.
*sigh*
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zero so that we return an empty map on error.
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I just spent five hours looking in the wrong place because of this.
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For the possibility of sleeping, the first two flags are UVM_PLA_WAITOK
and UVM_PLA_NOWAIT. It is an error not to show intention, so assert that
one of the two is provided. Switch over every caller in the tree to
using the appropriate flag.
ok art@, ariane@
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ok reyk@
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bus address space. Fixes a problem reported by david@.
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based on the BIOS memory map.
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processors, so the registers to configure addition HyperTransport links
are absent. Don't try attaching addition pci busses on these processors
to avoid probing non-existant registers.
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dmamap rather than all the bytes that are described by the sg list we're
mapping.
tested on iwn by me and beck@
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the bug in it. bugfix will be committed next.
make bus_dmamap_load_raw respect the constraints of the dmamap we're
loading the raw memory into, particularly the segment size constraint.
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ok oga
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loading the raw memory into.
similair to the change made to src/sys/arch/amd64/amd6/bus_dma.c 1.18
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when recording
ok oga, deraadt
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between instances, saving space in the kernel. feedback from many (some
incorporated, some left for future work).
ok deraadt, kettenis, "why not" miod.
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MD code would free resources that couldn't be freed until we were no
longer running in that processor. However, it's is unused on all
architectures since mikeb@'s tss changes on x86 earlier in the year.
ok miod@
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levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.
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a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
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ok jsg@
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try to be smart for the address range, uvm_pglistalloc() is smart enough
nowadays.
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APM_IOC_{SUSPEND,STANDBY}_REQ: This is to fix an issue with apm suspend
where a call to zzz suspended the machine immediately, not giving anyone
listening for apm events (other than apmd) a chance to deal with the
upcoming change. This hit X hard since the introduction of drm, since it
needs to have time to idle the 3d engine and otherwise get the device
into a recoverable state. Such things are needed until we support
modesetting in the kernel.
Now, instead of forcing a suspend, using ioctl sends out an event similar
to if you had put the lid down, giving all userland applications a
chance to reply.
tested by sthen@ and beck@, especial thanks to sthen for sitting there
while I tried to debug this remotely, I owe him beer.
Prompted by and ok deraadt@
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ok deraadt@
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code from mlarkin and me
help from art,toby,jordan and several others
ok jordan, go for it deraadt
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"I like it" deraadt "sweet" tedu "love it" marco
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if attempts are made to read it. So read MSR_TEMPERATURE_TARGET only
when ci_model == 0xe.
Found when my Core i7 box blew up. FreeBSD allows a few more chips
but this allows my box to boot.
ok jsg@
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in seperate variables in struct cpu_info instead
of duplicating the process of extracting it from the signature.
Use this value when determining the bus clock on P6/family 0x6
chips, which fixes speedstep on bernd@'s ThinkPad x200s.
Discussed with several, 'just do it' weingart@, ok mikeb@
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