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2024-05-13remove prototypes with no matching functionJonathan Gray
ok mpi@
2024-05-13remove some unused defines and externsJonathan Gray
isaphysmem and isaphysmempgs were removed in 1998 ok kettenis@
2024-05-07drop the MD byte-swap micro-optimizations on clang architecturesChristian Weisgerber
The compiler already translates the generic code into arithmetic byte-swap instructions or byte-swapping memory load and store instructions if available on an architecture. ok deraadt@ guenther@
2024-05-01Add per-CPU caches to the pmemrange allocator.Martin Pieuchot
The caches are used primarily to reduce contention on uvm_lock_fpageq() during concurrent page faults. For the moment only uvm_pagealloc() tries to get a page from the current CPU's cache. So on some architectures the caches are also used by the pmap layer. Each cache is composed of two magazines, design is borrowed from jeff bonwick vmem's paper and the implementation is similar to the one of pool_cache from dlg@. However there is no depot layer and magazines are refilled directly by the pmemrange allocator. This version includes splvm()/splx() dances because the buffer cache flips buffers in interrupt context. So we have to prevent recursive accesses to per-CPU magazines. Tested by naddy@, solene@, krw@, robert@, claudio@ and Laurence Tratt. ok claudio@, kettenis@
2024-04-29remove unused global varsJonathan Gray
ok deraadt@ miod@
2024-04-19Revert per-CPU caches a double-free has been found by naddy@.Martin Pieuchot
2024-04-17Add per-CPU caches to the pmemrange allocator.Martin Pieuchot
The caches are used primarily to reduce contention on uvm_lock_fpageq() during concurrent page faults. For the moment only uvm_pagealloc() tries to get a page from the current CPU's cache. So on some architectures the caches are also used by the pmap layer. Each cache is composed of two magazines, design is borrowed from jeff bonwick vmem's paper and the implementation is similar to the one of pool_cache from dlg@. However there is no depot layer and magazines are refilled directly by the pmemrange allocator. Tested by robert@, claudio@ and Laurence Tratt. ok kettenis@
2024-04-14with empty body loops, put final semicolon on a new line for readabilityJonathan Gray
ok bluhm@ jca@
2024-04-03pmap_virtual_space() and pmap_steal_memory() are mutually exclusive, soMiod Vallat
make sure only one of them is prototyped and only one of them is implemented. ok mpi@ kettenis@
2024-02-25clockintr: rename "struct clockintr_queue" to "struct clockqueue"Scott Soule Cheloha
The code has outgrown the original name for this struct. Both the external and internal APIs have used the "clockqueue" namespace for some time when operating on it, and that name is eyeball-consistent with "clockintr" and "clockrequest", so "clockqueue" it is.
2024-02-23ddb(4): db_read_bytes/db_write_bytes: change dst/src parameter to void*Scott Soule Cheloha
Almost all db_read_bytes() callers cast the destination buffer argument to char*, which suggests the API's prototype is incompatible with how the API is actually used. Change db_read_bytes() and db_write_bytes() to take a void* as the destination/source buffer parameter so callers don't need to cast the argument. With input from bluhm@. Bugs caught by Clemens Gossnitzer (ASCII approximation of name). Thread: https://marc.info/?l=openbsd-tech&m=170740813021636&w=2 ok bluhm@
2024-01-28set -fno-stack-protector in NORMAL_C_NOP, which is used to compileTheo de Raadt
mcount.c, in the same way that -fno-ret-protector is set (because the default ret-protector is an "always" generator). This change ensures there is never a stack protector prologue/epilogue in the functions in that file, no matter what stack protector selection algorithm is in play. ok kettenis guenther
2024-01-24clockintr: switch from callee- to caller-allocated clockintr structsScott Soule Cheloha
Currently, clockintr_establish() calls malloc(9) to allocate a clockintr struct on behalf of the caller. mpi@ says this behavior is incompatible with dt(4). In particular, calling malloc(9) during the initialization of a PCB outside of dt_pcb_alloc() is (a) awkward and (b) may conflict with future changes/optimizations to PCB allocation. To side-step the problem, this patch changes the clockintr subsystem to use caller-allocated clockintr structs instead of callee-allocated structs. clockintr_establish() is named after softintr_establish(), which uses malloc(9) internally to create softintr objects. The clockintr subsystem is no longer using malloc(9), so the "establish" naming is no longer apt. To avoid confusion, this patch also renames "clockintr_establish" to "clockintr_bind". Requested by mpi@. Tweaked by mpi@. Thread: https://marc.info/?l=openbsd-tech&m=170597126103504&w=2 ok claudio@ mlarkin@ mpi@
2023-12-14NKMEMPAGES_MAX_DEFAULT is no longer used. Remove it from param.h.Claudio Jeker
OK miod@
2023-12-13Fix syscall number bounds check computations.Miod Vallat
2023-12-12remove support for syscall(2) -- the "indirection system call" becauseTheo de Raadt
it is a dangerous alternative entry point for all system calls, and thus incompatible with the precision system call entry point scheme we are heading towards. This has been a 3-year mission: First perl needed a code-generated wrapper to fake syscall(2) as a giant switch table, then all the ports were cleaned with relatively minor fixes, except for "go". "go" required two fixes -- 1) a framework issue with old library versions, and 2) like perl, a fake syscall(2) wrapper to handle ioctl(2) and sysctl(2) because "syscall(SYS_ioctl" occurs all over the place in the "go" ecosystem because the "go developers" are plan9-loving unix-hating folk who tried to build an ecosystem without allowing "ioctl". ok kettenis, jsing, afresh1, sthen
2023-12-12The sigtramp was calling sigreturn(2), and upon failure exit(2), whichTheo de Raadt
doesn't make sense anymore. It is better to just issue an illegal instruction. ok kettenis, with some misgivings about inconsistant approaches between architectures. In the future we could change sigreturn(2) to never return an exit code, but always just terminate the process. We stopped this system call from being callable ages ago with msyscall(2), and there is no stub for it in libc.. maybe that's the next step to take?
2023-12-11Implement per-CPU caching for the page table page (vp) pool and the PTEMark Kettenis
descriptor (pted) pool in the arm64 pmap implementation. This significantly reduces the side-effects of lock contention on the kernel map lock that is (incorrectly) translated into excessive page daemon wakeups. This is not a perfect solution but it does lead to significant speedups on machines with many CPU cores. This requires adding a new pmap_init_percpu() function that gets called at the point where kernel is ready to set up the per-CPU pool caches. Dummy implementations of this function are added for all non-arm64 architectures. Some other architectures can probably benefit from providing an actual implementation that sets up per-CPU caches for pmap pools as well. ok phessler@, claudio@, miod@, patrick@
2023-12-10Add a new label "sigcodecall" inside every sigtramp definition, directlyTheo de Raadt
in front of the syscall instruction. This is used to calculate the start of the syscall for SYS_sigreturn and pinned system calls. ok kettenis
2023-11-08Increase NKMEMPAGES_MAX_DEFAULT to same value as on amd64.Marcus Glocker
OK deraadt@
2023-10-30Use KERNEL_ASSERT_UNLOCKED() instead of KASSERT(!_kernel_lock_held()).Vitaliy Makkoveev
The first one defined as the second, so no functional changed. ok claudio
2023-10-24Normally context switches happen in mi_switch() but there are 3 casesClaudio Jeker
where a switch happens outside. Cleanup these code paths and make the machine independent. - when a process forks (fork, tfork, kthread), the new proc needs to somehow be scheduled for the first time. This is done by proc_trampoline. Since proc_trampoline is machine dependent assembler code change the MP specific proc_trampoline_mp() to proc_trampoline_mi() and make sure it is now always called. - cpu_hatch: when booting APs the code needs to jump to the first proc running on that CPU. This should be the idle thread for that CPU. - sched_exit: when a proc exits it needs to switch away from itself and then instruct the reaper to clean up the rest. This is done by switching to the idle loop. Since the last two cases require a context switch to the idle proc factor out the common code to sched_toidle() and use it in those places. Tested by many on all archs. OK miod@ mpi@ cheloha@
2023-09-17clockintr: remove clockintr_init(), clockintr_flagsScott Soule Cheloha
All the state initialization once done in clockintr_init() has been moved to other parts of the kernel. It's a dead function. Remove it. Likewise, the clockintr_flags variable no longer sports any meaningful flags. Remove it. This frees up the CL_* flag namespace, which might be useful to the clockintr frontend if we ever need to add behavior flags to any of those functions.
2023-09-14clockintr: replace CL_RNDSTAT with global variable statclock_is_randomizedScott Soule Cheloha
In order to separate the statclock from the clock interrupt subsystem we need to move all statclock state out into the broader kernel. Start by replacing the CL_RNDSTAT flag with a new global variable, "statclock_is_randomized", in kern_clock.c. Update all clockintr_init() callers to set the boolean instead of passing the flag. Thread: https://marc.info/?l=openbsd-tech&m=169428749720476&w=2
2023-09-10load amd patch into a malloc'd region to make it page alignedJonathan Gray
avoids a General-Protection Exception on patch loader wrmsr with A10-5700, TN-A1 00610f01 15-10-01 the alignment requirement is not present on at least Ryzen 5 2600X, PiR-B2 00800f82 17-08-02 problem reported and fix tested by espie@
2023-09-06revert disabling warnings for zlib on clang >= 15Jonathan Gray
no longer needed with zlib 1.3 ok tb@
2023-08-23all platforms: separate cpu_initclocks() from cpu_startclock()Scott Soule Cheloha
To give the primary CPU an opportunity to perform clock interrupt preparation in a machine-independent manner we need to separate the "initialization" parts of cpu_initclocks() from the "start the clock interrupt" parts. Currently, cpu_initclocks() does everything all at once, so there is no space for this MI setup. Many platforms have more-or-less already done this separation by implementing a separate routine named "cpu_startclock()". This patch promotes cpu_startclock() from de facto standard to mandatory API. - Prototype cpu_startclock() in sys/systm.h alongside cpu_initclocks(). The separation of responsibility between the two routines is a bit fuzzy but the basic guidelines are as follows: + cpu_initclocks() must initialize hz, stathz, and profhz, and call clockintr_init(). + cpu_startclock() must call clockintr_cpu_init() and start the clock interrupt cycle on the calling CPU. These guidelines will shift in the future, but that's the way things stand as of *this* commit. - In initclocks(): first call cpu_initclocks(), then do MI setup, and last call cpu_startclock(). - On platforms where cpu_startclock() already exists: don't call cpu_startclock() from cpu_initclocks() anymore. - On platforms where cpu_startclock() doesn't yet exist: implement it. Usually this is as simple as dividing cpu_initclocks() in two. Tested on amd64 (i8254, lapic), arm64, i386 (i8254, lapic), macppc, mips64/octeon, and sparc64. Tested on arm/armv7 (agtimer(4)) by phessler@ and jmatthew@. Tested on m88k/luna88k by aoyama@. Tested on powerpc64 by gkoehler@ and mlarkin@. Tested on riscv64 by jmatthew@. Thread: https://marc.info/?l=openbsd-tech&m=169195251322149&w=2
2023-08-22i386: i8254_initclocks: set IPL_MPSAFE for clock/rtc IRQsScott Soule Cheloha
Setting IPL_MPSAFE for the i8254/mc146818 IRQs appeases a KASSERT in apic_intr_establish() and allows the system to boot via the i8254 path. This makes testing changes to the i8254/mc146818 code much easier on modern hardware without mucking with the GENERIC config. We already set IPL_MPSAFE for these IRQs in the equivalent amd64 code. Now, setting IPL_MPSAFE is a lie: the i8254 and mc146818 IRQs are not MP-safe. However, the lie is harmless because we only reach i8254_initclocks() if (a) there is no APIC at all, or (b) we fail to calibrate the local APIC timer. Thread: https://marc.info/?l=openbsd-tech&m=169258915227321&w=2 ok mlarkin@
2023-08-16avoid bios sign msr on intel family < 6Jonathan Gray
the pentium msr list in the sdm does not include it
2023-08-16avoid patch level msr on amd families < 0fhJonathan Gray
Paul de Weerd reported it isn't implemented on ALIX with cpu0: Geode(TM) Integrated Processor by AMD PCS ("AuthenticAMD" 586-class) 499 MHz, 05-0a-02 the earliest amd microcode update files I can find are for family 0fh (K8) ok guenther@
2023-08-16add Intel ARCH_CAP_GDS bitsJonathan Gray
mentioned in https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/gather-data-sampling.html
2023-08-15drop MSDOSFS from i386 floppyJonathan Gray
sthen mentioned it is out of space. ok deraadt@
2023-08-09correct platform id mask, it is 3 bits 52:50Jonathan Gray
2023-08-09show x86 cpu patch level in dmesgJonathan Gray
ok guenther@ deraadt@
2023-07-31Mark code parameter of codepatch_replace() constant also on i386.Alexander Bluhm
OK guenther@
2023-07-28Fix off-by-one: SEFF0ECX_WAITPKG is bit 5, not bit 4.Jonathan Gray
from guenther@ in amd64
2023-07-25statclock: move profil(2), GPROF code to profclock(), gmonclock()Scott Soule Cheloha
This patch isolates profil(2) and GPROF from statclock(). Currently, statclock() implements both profil(2) and GPROF through a complex mechanism involving both platform code (setstatclockrate) and the scheduler (pscnt, psdiv, and psratio). We have a machine-independent interface to the clock interrupt hardware now, so we no longer need to do it this way. - Move profil(2)-specific code from statclock() to a new clock interrupt callback, profclock(), in subr_prof.c. Each schedstate_percpu has its own profclock handle. The profclock is enabled/disabled for a given CPU when it is needed by the running thread during mi_switch() and sched_exit(). - Move GPROF-specific code from statclock() to a new clock interrupt callback, gmonclock(), in subr_prof.c. Where available, each cpu_info has its own gmonclock handle . The gmonclock is enabled/disabled for a given CPU via sysctl(2) in prof_state_toggle(). - Both profclock() and gmonclock() have a fixed period, profclock_period, that is initialized during initclocks(). - Export clockintr_advance(), clockintr_cancel(), clockintr_establish(), and clockintr_stagger() via <sys/clockintr.h>. They have external callers now. - Delete pscnt, psdiv, psratio. From schedstate_percpu, also delete spc_pscnt and spc_psdiv. The statclock frequency is not dynamic anymore so these variables are now useless. - Delete code/state related to the dynamic statclock frequency from kern_clockintr.c. The statclock frequency can still be pseudo-random, so move the contents of clockintr_statvar_init() into clockintr_init(). With input from miod@, deraadt@, and claudio@. Early revisions cleaned up by claudio. Early revisions tested by claudio@. Tested by cheloha@ on amd64, arm64, macppc, octeon, and sparc64 (sun4v). Compile- and boot- tested on i386 by mlarkin@. riscv64 compilation bugs found by mlarkin@. Tested on riscv64 by jca@. Tested on powerpc64 by gkoehler@.
2023-07-25Some hypervisors (such as Hertzner) allow msr read of DE_CFG (which doesTheo de Raadt
not indicate bit 9 set, but they could have a firmware fix) but then block a msr write to bit 9 (which disables enough AVX optimizations to prevent the exfiltration of data), with a fault. So let's also check the HV bit before we decide to modify the bit. hypervisors are expected to set that bit. tested by lucas at sexy dot is. with jsg, ok mlarkin
2023-07-24Set DE_CFG[9] -- a chickenbit which stops Zenbleed. The chickenbit mayTheo de Raadt
have other side-effects (not disclosed by AMD), and firmwares fixes may be better (and have other side-effects, same story). Newer processors will probably be validated more carefully by AMD. Issue found by Tavis Ormandy. This is errata 7.2/033_amdcpu.patch.sig and 7.3/011_amdcpu.patch.sig Zenbleed also blocked on select cpus by using errata 7.3/012_amdfirmware.patch.sig + 7.3/013_amdcpufirmware.patch / 7.2/034_amdfirmware.patch.sig + 7.2/035_amdcpufirmware.patch.sig which load AMD cpu firmwares (firmware.openbsd.org is updated often to contain the best firmwares) ok jsg
2023-07-24after the boot block changes on i386, sthen noticed a dmesg changeJonathan Gray
-pci0 at mainbus0 bus 0: configuration mode 1 (bios) +pci0 at mainbus0 bus 0: configuration mode 1 (no bios) deraadt then spent many hours narrowing down the problem to the inline assembly in pciprobe(). It tried to save the carry flag result of pci bios present. But did so after a shift which sets the carry flag. Ask for CF in the output and avoid the shift. ok deraadt@ kettenis@
2023-07-23update AMD CPU microcode if a newer patch is availableJonathan Gray
ok deraadt@
2023-07-22BOOTARG_UCODE for AMDJonathan Gray
ok deraadt@
2023-07-21Rename ARCH_CAPABILITIES_* #defined to ARCH_CAP_*Philip Guenther
Provide more ARCH_CAP_* defines per June 2023 SDM ok jsg@ deraadt@
2023-07-20Assign wsdisplay0 to the glass console always. The same change isYASUOKA Masahiko
done for GENERIC already. ok kettenis kn
2023-07-08Move /dev/apm related acpi code to acpi_apm.c which is only built onTobias Heider
amd64 and i386. This is the first step towards a machine independent safe sleep API. tested by yasuoka@ bluhm@ ok deraadt@ kettenis@
2023-07-02all platforms, kernel: remove __HAVE_CLOCKINTR symbolScott Soule Cheloha
Every platform made the clockintr switch at least six months ago. The __HAVE_CLOCKINTR symbol is now redundant. Remove it. Prompted by claudio@. Link: https://marc.info/?l=openbsd-tech&m=168826181015032&w=2 "makes sense" mlarkin@
2023-06-22Instead of tsleep on lbolt do a tsleep with a 1 second timeout.Claudio Jeker
Result is the same and gets rid of a lbolt use. OK miod@
2023-06-15all platforms, main(): call clockqueue_init() just before sched_init_cpu()Scott Soule Cheloha
Move the clockqueue_init() call out of clockintr_cpu_init() and up just before the sched_init_cpu() call for a given CPU. This will allow sched_init_cpu() to allocate clockintr handles for a given CPU's scheduler in a later patch. Link: https://marc.info/?l=openbsd-tech&m=168661507607622&w=2 ok kettenis@, claudio@
2023-05-30spellingJonathan Gray
ok jmc@ guenther@ tb@
2023-04-26Implement dt(4) utrace support on amd64 and i386.Claudio Jeker
This adds stacktrace_save_utrace() to extract and save the userland stack which is stubbed out on most archs. alpha and riscv64 do not even implement dt(4) and stacktrace_save_at() so the stubs are excluded there. Additionally add a new ioctl DTIOCGETAUXBASE which allows btrace to fetch the AUX_BASE vallue from the AUX vector of a process. OK mpi@ (some time ago) discussed with kettenis@