src - OpenBSD base system

Age	Commit message (Expand)	Author
2007-02-11	Rework the cache handling routines again. We now try to operate on the exact	Miod Vallat
2005-12-11	Work in progress SMP code; mvme88k boards can spin up secondary CPUs,	Miod Vallat
2005-12-04	Let cmmu_init() now return the cpuid of the master cpu.	Miod Vallat
2005-12-04	Slight cmmu code cleanup; use shorter function names, remove parity_enable	Miod Vallat
2005-12-03	Replace simplelocks with __cpu_simple_locks for cmmu and pmap locking,	Miod Vallat
2005-12-03	Switch m88k ports to __HAVE_CPUINFO. Current cpu pointer is held in SR0	Miod Vallat
2005-12-02	Better choice of types for struct pmap members and cmmu functions;	Miod Vallat
2005-11-25	Let the cache synchronization and invalidation functions report whether	Miod Vallat
2005-09-25	Change the size parameter of cmmu_flush_tlb() from bytes to pages. This makes	Miod Vallat
2005-04-27	Allow userland to cause the data cache to be flushed for any arbitrary address	Miod Vallat
2005-04-27	Move constants for dma_cachectl() to cmmu.h where they belong.	Miod Vallat
2005-03-28	Relax dependencies.	Miod Vallat
2004-08-06	Merge Luna88k and mvme88k M88200 management code. Features:	Miod Vallat
2004-08-04	Completely remove BATC code. BATC on 88200 are way too small to be worth	Miod Vallat
2004-08-02	More include files cleaning:	Miod Vallat
2004-05-07	Introduce a new cmmu operation, cachectl_pa, similar to cachectl, but taking	Miod Vallat
2004-04-26	Start factorizing luna88k and mvme88k common parts.	Miod Vallat