Age | Commit message (Collapse) | Author |
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1 for 88110), for userland to have an easy way to figure out.
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on m88k.
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have jumped on it instead of basing the FPU completion work on the sparc
FPU code.
This is now repaired with this commit, and m88110_fp.c changes directory
again, for the last time.
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sparc{,64} floating-point emulator, adapted to the 88110 specifics. Handling
of these traps is now entirely done in C for convenience.
Although there are a few rounding issues to address, and the XRF is ignored,
this allows all the ieee754 regression tests to pass (lib/libc/ieeefp,
sys/kern/signal/fpsig, sys/kern/signal/sigfpe).
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this allows us to get rid of the dependency of asm_macro.h on asm.h, which
was really only there to bring in psl.h.
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in a _KERNEL-only section, and we want to eventually be able to use it from
the bootblocks.
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invalidate tlb ipis, and turn them into simple ``handle once'' ipis.
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MVME197DP to serialize 88410 operations.
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more work in progress to handle these exceptions correctly, and document
a new undocumented and evil chip bug while there.
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field from the processor identification register; this allows .S code which
needs to decide on the cpu type at runtime to check quicker, without needing
to access memory. No functional change.
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so do the naive operations with interrupts disabled, and an interlock held
if MULTIPROCESSOR.
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an IPI facility, for MVME197DP.
It's still missing a few remote cache IPIs and IPI do not seem to be reliably
triggered on remote processors at the moment (but this could be a problem
on the board I am currently testing on), at least it will boot multiuser
using only cpu0 to schedule processes.
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atomic compare-and-swap operation.
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x86 __mp_lock changes, but keeping the internal __cpu_simplelock_t to
guarantee atomic access to the __mp_lock fields.
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for the current processor. And remove now unused cmmu_flush_data_page().
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and will not require such a lock.
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own functions, which do not need to be processor-specific.
This speeds up the exception return sequence a bit.
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appropriate types. No functional change.
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boards such as mvme1[89]7 where spl changes can be atomic.
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the tf_mode name. This field only contains flags used internally by the
exception processing code.
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been years since it has last been used for that purpose, so name it the
initialization/startup stack.
While there, do not store the initialization stack in cpu_info, and have
secondary_pre_main() return its value so that the bootstrap code does not
need to fetch it from cpu_info.
This might be reconsidered when the startup stacks will be freed after they
are not used anymore, but there are more things to do first.
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a single ci_flags bitfield.
Also, set_cpu_number() will no longer set CIF_PRIMARY on the primary processor,
it's up to the initialization code to do this.
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global; and only schedule software interrupts on the currently running cpu.
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stack a startup stack.
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and put the process it was running back on the run queue (unless this was
the idle proc).
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of a local __cpu_simple_lock_t (which is volatile), so that the compiler can
optimize it to a register, instead of using a memory location (and doing
stores into it when __cpu_simple_lock() is spinning).
This makes the MP code a bit smaller and a bit faster.
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xmem instruction does it for us.
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extension.
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get rid of the ``switchframe'' struct definition. As a bonus, this makes
cpu_fork() simpler and unwastes 8 bytes of u area.
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that proc_trampoline has been fixed.
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- Move the functionality of choosing a process from cpu_switch into
a much simpler function: cpu_switchto. Instead of having the locore
code walk the run queues, let the MI code choose the process we
want to run and only implement the context switching itself in MD
code.
- Let MD context switching run without worrying about spls or locks.
- Instead of having the idle loop implemented with special contexts
in MD code, implement one idle proc for each cpu. make the idle
loop MI with MD hooks.
- Change the proc lists from the old style vax queues to TAILQs.
- Change the sleep queue from vax queues to TAILQs. This makes
wakeup() go from O(n^2) to O(n)
there will be some MD fallout, but it will be fixed shortly.
There's also a few cleanups to be done after this.
deraadt@, kettenis@ ok
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the holes a MMU may have from a given vm_map. This will be automagically
invoked for newly created vmspaces.
On platforms with MMU holes (e.g. sun4, sun4c and vax), this prevents
mmap(2) hints which would end up being in the hole to be accepted as valid,
causing unexpected signals when the process tries to access the hole
(since pmap can not fill the hole anyway).
Unfortunately, the logic mmap() uses to pick a valid address for anonymous
mappings needs work, as it will only try to find an address higher than the
hint, which causes all mmap() with a hint in the hole to fail on vax. This
will be improved later.
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mbuf constants from MD param.h to MI param.h.
Besides being the same on every arch, things will
most probly break if any arch has different values
then the others.
The NMBCLUSTERS constants needs to be MD though;
ok miod@,krw@,claudio@
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similar to the fix which went into i386 and amd64 a few weeks ago.
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splassert_ctl > 0 in __predict_false().
ok deraadt@
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have cpu_info now, so kill the option.
eyeballed by jsg@ and grange@
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option. Every architecture implements mutexes now.
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send clock ticks to secondary processors.
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it's a good idea to use atomic.h operations on it. This mechanic
change updates all bit operations on p_flag to atomic_{set,clear}bits_int.
Only exception is that P_OWEUPC is set by MI code before calling
need_proftick and it's automatically cleared by ADDUPC. There's
no reason for MD handling of that flag since everyone handles it the
same way.
kettenis@ ok
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rt and such; tested and ok miod drahn
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