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path: root/sys/arch/m88k/include
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2007-05-28Move the MSIZE, MCLSHIFT, MCLBYTES and the MCLOFSETThordur I. Bjornsson
mbuf constants from MD param.h to MI param.h. Besides being the same on every arch, things will most probly break if any arch has different values then the others. The NMBCLUSTERS constants needs to be MD though; ok miod@,krw@,claudio@
2007-05-19Send an IPI in signotify() if the process runs on a different processor,Miod Vallat
similar to the fix which went into i386 and amd64 a few weeks ago.
2007-05-19Simpler asm constraints for simplelock operations.Miod Vallat
2007-05-16splassert_ctl defaults to 1 now, so dont wrap the checks forThordur I. Bjornsson
splassert_ctl > 0 in __predict_false(). ok deraadt@
2007-05-16The world of __HAVEs and __HAVE_NOTs is reducing. All architecturesArtur Grabowski
have cpu_info now, so kill the option. eyeballed by jsg@ and grange@
2007-05-15Remove the MI implementation of mutexes and remove the __HAVE_MUTEXArtur Grabowski
option. Every architecture implements mutexes now.
2007-05-14Work in progress IPI mechanism, currently only implemented on MVME188, toMiod Vallat
send clock ticks to secondary processors.
2007-04-18Use atomic operations to change the pending software interrupt mask.Miod Vallat
2007-03-21Real atomic_{set,clear}bits_int implementation, ok deraadtMiod Vallat
2007-03-15Since p_flag is often manipulated in interrupts and without biglockArtur Grabowski
it's a good idea to use atomic.h operations on it. This mechanic change updates all bit operations on p_flag to atomic_{set,clear}bits_int. Only exception is that P_OWEUPC is set by MI code before calling need_proftick and it's automatically cleared by ADDUPC. There's no reason for MD handling of that flag since everyone handles it the same way. kettenis@ ok
2007-02-19only make this interface available to the kernel for now, discussed withaTheo de Raadt
rt and such; tested and ok miod drahn
2007-02-11Rework the cache handling routines again. We now try to operate on the exactMiod Vallat
address range we've been given, rounded to cache line boundaries, instead of being lazy and operating on pages as soon as the range was large enough. Also, since the ranges we'll be invoked for are reasonably small, it does not make sense to check for segment sizes - we're always smaller, really. While there, hardcode the size in cmmu_flush_data_cache(), which becomes cmmu_flush_data_page(), since it was always invoked for complete pages.
2007-02-06Add machine/atomic.h to all architectures and define two operationsArtur Grabowski
right now that are supposed to be atomic with respect to interrupts and SMP: atomic_setbits_int and atomic_clearbits_int. All architectures other than i386 and amd64 get dummy implementations since at first we'll be replacing operations that are done with "a |= bit" and "a &= ~bit" today. More proper implementations will follow kettenis@, miod@ ok
2007-01-13Bring back a <machine/frame.h> for m88k platforms, by splitting <machine/pcb.h>Miod Vallat
in its exception-related contents and pcb-related contents.
2007-01-12Change the secondary CMMU's data cache turn on so that do not hog theKenji Aoyama
bus while they spin, as same as 3.8. This have been missed since CMMU initialize cleanup. Also m88k_cpus[] should have 4 elements on luna88k, even in non-MULTIPROCESSOR kernel. ok miod@
2006-12-24Define PROC_PC. Then, since profiling information is being reported inMiod Vallat
statclock(), do not bother doing this in userret() anymore. As a result, userret() does not need its pc and ticks arguments, simplify.
2006-11-29Remove cpu_swapin() and cpu_swapout(), they are no longer necessary (exceptMiod Vallat
for cpu_swapin() on hppa* which is kept).
2006-11-18On 88100 systems which do not need the xxx.usr instruction workaround,Miod Vallat
override the DAE helper routines with workaroundless code while the kernel text is still writable.
2006-11-18Stop saving and restoring the current ipl in the pcb when switching processes,Miod Vallat
since we know we are at splsched().
2006-11-18No need to use xmem when unlocking a simple_lock.Miod Vallat
2006-11-16Ratibibugle struct frame and <machine/frame.h>Miod Vallat
2006-06-04When VM_PHYSSEG_MAX is 1, use VM_PSTRAT_RANDOM for VM_PHYSSEG_STRAT, thisMiod Vallat
makes uvm_page.o smaller.
2006-05-21kvtopte() is not used anymore.Miod Vallat
2006-05-20Crank VM_MAX_ADDRESS to 4GB minus one page now that pmap will accept it.Miod Vallat
2006-05-20Make sure pmap copes with address wraparounds when operating on ranges.Miod Vallat
This removes the dependency for VM_MAX_ADDRESS to be aligned on a segment boundary. While there, remove a few internal pmap macros from mmu.h.
2006-05-19INTSTACK_SIZE is not used anymore.Miod Vallat
2006-05-08Replace gazillions of badvaddr() or badwordaddr() calls with badaddr() calls.Miod Vallat
With a few prototype declarations shuffling, this finally allows <machine/locore.h> to die.
2006-05-08Clean the internal m88k trap type codes; while there, simplify andMiod Vallat
factorize the build of the VBR page betweem luna88k and mvme88k. Tested by aoyama@ and I.
2006-05-07Move the userland stack at the top of the userland address space.Miod Vallat
2006-05-06On 88100-based systems, take the two hardwired BATC into account inMiod Vallat
pmap_extract(), and do not bother creating regular page table mappings for obio regions which are covered by these BATC entries.
2006-05-04Document the 88110 extended (80-bit) floating point format.Miod Vallat
2006-05-03Overhaul of the disassembler code, with random fixes, better conditionnalMiod Vallat
branches decoding, correct control register descriptions, and (the reason for these changes in the first place) 88110 instruction support. ddb will now disassemble by default for the processor it is running for, and using the alternate format (x/I) disassembles for the other.
2006-05-02Replace db_{disable,enable}_interrupts with expanded version of themselves,Miod Vallat
having macros for this is not worth doing.
2006-04-17Save pointers to up to four CMMU PFSR registers into the cpu_info structure.Miod Vallat
This allows the exception handling code to skip the PFSR address computations. The net result is that the PFSR_SAVE code becomes much simpler and smaller, and that all processors will now spend time in PFSR_SAVE - previously, cpu0 was favored and other processors took a bit more time. Note that 8:1 configurations do not use these fields - but then this is a fixed monoprocessor configuration, for which the existing code was already doing The Right Thing. Tested on luna88k (2:1) by aoyama@, and on mvme88k (2:1 and 4:1) by me.
2006-04-15nmihand() is mvme88k only, move it out of m88k common area.Miod Vallat
2006-04-09#ifdef lint wraps for va_startTheo de Raadt
2006-03-19remove unused bdbtofsb(bn) macroMartin Reindl
found by drahn@
2006-03-13remove splimp.Brad Smith
ok miod@
2006-01-13Make size_t, ssize_t, intptr_t and uintptr_t consistent amongst ourTodd C. Miller
architectures. They are now defined as unsigned long, long, long and unsigned long respectively.
2006-01-10Remove duplicate _C_LABEL define. OK miod@Todd C. Miller
2006-01-09Fix last change; we need machine/reg.h for struct sigcontext toTodd C. Miller
be fully defined.
2006-01-08Expose struct sigcontext, struct sigstat and struct sigaltstack for XPG4.2Todd C. Miller
2006-01-06Don't redefine SIZE_MAXTodd C. Miller
2006-01-06Adapt things to use __type_t instead of _BSD_TYPE_T_Todd C. Miller
Add new sys/_types.h header Include machine/_types.h or sys/_types.h where applicable
2006-01-06Merge machine/ansi.h and machine/types.h into machine/_types.h andTodd C. Miller
rename the types using the __ protected namespace (e.g. __size_t). Idea from FreeBSD.
2005-12-20Fix typo introduced in last commit.Todd C. Miller
2005-12-14convert _FOO_SOURCE -> __FOO_VISIBLE in machine. OK deraadt@Todd C. Miller
2005-12-14Make clock_t consistent across platforms as a 32 bit int. OK deraadt@Todd C. Miller
2005-12-13First step in include files overhaul. Use __FOO_VISIBLE (as definedTodd C. Miller
in sys/cdefs.h) instead of _FOO_SOURCE. Also fix several namespace pollution issues, including the byte order defines. OK deraadt@
2005-12-11Work in progress SMP code; mvme88k boards can spin up secondary CPUs,Miod Vallat
kernel boots single user. Still a lot of polishing and bugfixing to do.