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2008-05-02Check for a disabled FPU before attempting to emulate the instruction.Miod Vallat
2008-05-02Grab the biglock unconditionnaly when system calls go through systrace;Miod Vallat
spotted by drahn
2008-04-25neccessary -> necessary; from Pierre RiteauJason McIntyre
2008-04-01typoMiod Vallat
2008-02-20Preserve pcb_onfault within kcopy(), as expected and as all other platforms do.Miod Vallat
2008-02-16On these platforms, REDUCEing unconditionnaly a second time is faster andMiod Vallat
shorter code than a conditional ADDCARRY, so use it; inspired by hppa.
2008-01-13Add a machdep.cputype sysctl, which returns the processor type (0 for 88100,Miod Vallat
1 for 88110), for userland to have an easy way to figure out.
2007-12-31replace ctob/btoc by ptoa/atop as done for other architecturesMartin Reindl
2007-12-29Override SoftFloat's countLeadingZeros32() with a faster, ff1-based, versionMiod Vallat
on m88k.
2007-12-29Had I known we had a kernel version of John Hauser's SoftFloat code, I wouldMiod Vallat
have jumped on it instead of basing the FPU completion work on the sparc FPU code. This is now repaired with this commit, and m88110_fp.c changes directory again, for the last time.
2007-12-26Remove the last debug bit from the PSR on 88110: do not force memory accessesMiod Vallat
instructions to be serialized (this defeats the purpose of having a superscalar processor, and accesses to volatile variables are done with explicit memory barriers anyway). This brings a HUGE speedup: openssl speed -elapsed shows AES is 90% faster, blowfish is 75% faster, and sha1 is 50% faster. Not so bad! However, doing this increases the pressure on the processor bus, so it is necessary to increase the processor bus timeout on 40MHz boards again (to 256 usec). ``black cat'' 50MHz boards seem to be unaffected, so they remain at 64 usec.
2007-12-26Honour the rounding mode in fpu_ftoi().Miod Vallat
2007-12-26First try at getting the interval bits filled in fcmp{,u} results.Miod Vallat
2007-12-26Fix FPU_SET_CARRY()Miod Vallat
2007-12-25A few fixes in the exception bits reporting, spotted by John Hauser's TestFloat.Miod Vallat
2007-12-25Zero / Num should return a zero with the same sign as the divider.Miod Vallat
2007-12-25Accept valid forms of double-precision fmul/fadd/fsub/fdiv and reject invalidMiod Vallat
forms of fcvt where source and destination precision is the same.
2007-12-25Missing pointer initialization for int/nint/trnc exceptions.Miod Vallat
2007-12-25Never write boolean expressions which do not fit in one line, after midnight.Miod Vallat
2007-12-25Do not make struct pmap visible unless _KERNEL.Miod Vallat
2007-12-25Restart the m88110 floating-point trap code from scratch, basing it on theMiod Vallat
sparc{,64} floating-point emulator, adapted to the 88110 specifics. Handling of these traps is now entirely done in C for convenience. Although there are a few rounding issues to address, and the XRF is ignored, this allows all the ieee754 regression tests to pass (lib/libc/ieeefp, sys/kern/signal/fpsig, sys/kern/signal/sigfpe).
2007-12-22Make sure we have a real stack when invoking getipl() during exceptions.Miod Vallat
Fits in the brown-paperbag bug category.
2007-12-22Move initial PSR initialization to a separate routine, instead of duplicatingMiod Vallat
it five times.
2007-12-21Change the EF_xxx constants to be real offsets within the trapframe, insteadMiod Vallat
of offsets / sizeof(register_t), and nuke the REG_OFF macro. No functional change.
2007-12-20Get rid of disable_interrupt() and have caller use get_psr() and set_psr();Miod Vallat
this allows us to get rid of the dependency of asm_macro.h on asm.h, which was really only there to bring in psl.h.
2007-12-20Do not protect this file with _KERNEL; other header files which include it do itMiod Vallat
in a _KERNEL-only section, and we want to eventually be able to use it from the bootblocks.
2007-12-20Flush the source page before copying in pmap_copy_page(). This should notMiod Vallat
be necessary, but not doing it appears to break 88204 (not 88200) and split CMMUs.
2007-12-15Since the 88110 can not invalidate a particular tlb entry, do not stackMiod Vallat
invalidate tlb ipis, and turn them into simple ``handle once'' ipis.
2007-12-15Move the cmmu lock back from 8820x-specific code to global, and use it onMiod Vallat
MVME197DP to serialize 88410 operations.
2007-12-12Make non-88110 kernels (aviion, luna88k) kernels compile again.Miod Vallat
2007-12-09I honestly do not remember what 88110 errata convinced me to disableMiod Vallat
out-of-order (superscalar) execution on these processors. Since OoO brings a nice 50% to 250% speedup (as shown by ``openssl speed''), it is definitely worth enabling.
2007-12-08Better siginfo fault codes for floating point exceptions on 88110, withMiod Vallat
more work in progress to handle these exceptions correctly, and document a new undocumented and evil chip bug while there.
2007-12-08Do not pass a siginfo_t * pointer to the signal handler if no siginfoMiod Vallat
is required.
2007-12-05Make the CPU_88100 and CPU_88110 constants match the architectural numberMiod Vallat
field from the processor identification register; this allows .S code which needs to decide on the cpu type at runtime to check quicker, without needing to access memory. No functional change.
2007-12-05In dma_cachectl(), when flushing line by line, only invoke pmap_extract()Miod Vallat
once per page and cache the result.
2007-12-05xmem can not be used as a reliable atomic operation, they way we do them,Miod Vallat
so do the naive operations with interrupts disabled, and an interlock held if MULTIPROCESSOR.
2007-12-04Work in progress SMP code for 88110 processor using the BusSwitch chip asMiod Vallat
an IPI facility, for MVME197DP. It's still missing a few remote cache IPIs and IPI do not seem to be reliably triggered on remote processors at the moment (but this could be a problem on the board I am currently testing on), at least it will boot multiuser using only cpu0 to schedule processes.
2007-12-04In double_reg_fixup(), do not rely on tf_r[0] being zero.Miod Vallat
2007-12-04Improve setregs() so that it performs the equivalent of the first twoMiod Vallat
instructions of the new binary, which allows them to be skipped unconditionaly.
2007-12-04Faster splassert_check()Miod Vallat
2007-12-04Fix userland vs system test in errata #16 handling.Miod Vallat
2007-12-02Do not take biglock for NOLOCK system calls.Miod Vallat
2007-12-02Only check for errata #16 for instruction faults.Miod Vallat
2007-12-02Remove 88110 control registers accessors which are never used anywhere.Miod Vallat
2007-12-02The beginning of a real floating-point exception handler for the 88110. TheMiod Vallat
existing code to enable TCFP was broken, as it was not setting the TCFP bit in the right register. So far, the exception handler will deliver SIGFPE in all cases. It will eventually do the necessary rounding, and handle the odd-numbered register pair operation, as I get time to write this (or see how much can be lifted from the 88100 floating-point exception code).
2007-12-02Do not pass UPAGES and USPACE (under the name USIZE) in assym.h, code whichMiod Vallat
needs it includes <machine/param.h> already.
2007-12-02Since the 88110 doesn't disable the FPU when handling an exception (and doesMiod Vallat
not need to), do not try to handle exceptions occuring when we re-enable shadowing as special - these are just nested exceptions. While there, add a workaround for the 88110 rte errata (#18).
2007-12-02Sort and clean definitions. No functional changes.Miod Vallat
2007-12-02When setting up the vectors page, do not put a nop as the first instructionMiod Vallat
if the processor is a 88110, since only the 88100 suffers from the ``will fetch one instruction too far'' bug.
2007-12-02Provide faster bcopy() and bzero() routines for pmap_copy_page() andMiod Vallat
pmap_zero_page().
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