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2011-07-07There is a bunch of places in the kernel entry points where we don'tArtur Grabowski
hold the kernel lock, but still need call one function that needs it. Instead of grabbing the lock all over the place, move the locks into the affected functions: trapsignal, scdebug*, ktrsyscall, ktrsysret, systrace_redirect and ADDUPROF. In the cases we already hold the biglock we'll just recurse. kettenis@, beck@ ok
2011-07-06Clean up after P_BIGLOCK removal.Artur Grabowski
KERNEL_PROC_LOCK -> KERNEL_LOCK KERNEL_PROC_UNLOCK -> KERNEL_UNLOCK oga@ ok
2011-07-05Recommit the reverted sigacts change now that the NFS use-after-freePhilip Guenthe
problem has been tracked down. This fixes the sharing of the signal handling state: shared bits go in sigacts, per-rthread bits goes in struct proc. ok deraadt@
2011-05-30Remove the freelist member from vm_physsegOwain Ainsworth
The new world order of pmemrange makes this data completely redundant (being dealt with by the pmemrange constraints instead). Remove all code that messes with the freelist. While touching every caller of uvm_page_physload() anyway, add the flags argument to all callers (all but one is 0 and that one already used PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue without it. Should shrink the code a bit, as well. matthew@ pointed out some mistakes i'd made. ``freelist death, I like. Ok.' ariane@ `I agree with the general direction, go ahead and i'll fix any fallout shortly'' miod@ (68k 88k and vax i could not check would build)
2011-05-25Also enclose variable names with external linkage in __BEGIN_DECLS.Martynas Venckus
Doesn't matter much since C++ ABI used by GCC doesn't mangle variable names; however technically is required by Section 7.5 of the C++ spec. Discussed with/OK guenther@, matthew@.
2011-04-28fenv improvements and cleanupsMartynas Venckus
2011-04-21Revert the ``remove the `skip splraise/splx for IPL_NONE mutexes' optimization''Miod Vallat
change. It seems to have unexpected side effects, especially on MP systems, and drahn@ disagrees with the way this change has been done and think there is a better way to solve the original problem of msleep() fiddling with mutex internals.
2011-04-18Revert the sigacts diff: NFS can apparently retain pointers to processesPhilip Guenthe
until they're zombies and then send them signals (for intr mounts). Until that is untangled, the sigacts change is unsafe. sthen@ was the victim for this one
2011-04-15Correct the sharing of the signal handling state: stuff that shouldPhilip Guenthe
be shared (p_sigignore, p_sigcatch, P_NOCLDSTOP, P_NOCLDWAIT) moves to struct sigacts, wihle stuff that should be per rthread (ps_oldmask, SAS_OLDMASK, ps_sigstk) moves to struct proc. Treat the coredumping state bits (ps_sig, ps_code, ps_type, ps_sigval) as per-rthread until our locking around coredumping is better. Oh, and remove the old SunOS-compat ps_usertramp member. "I like the sound of this" tedu@
2011-04-07Make sure the ALIGN() macro uses u_long on all platforms for consistency, andMiod Vallat
update the comment block accordingly.
2011-04-06Fix a typo causing a sanity check in m88110_syscall() to never trigger.Miod Vallat
2011-04-03Remove the `skip splraise/splx for IPL_NONE mutexes' optimizations. It is notMiod Vallat
always gaining anything, and msleep() implementation depends upon mtx_leave() invoking splx().
2011-04-03Move PPWAIT flag from struct proc to process, so that rthreads inPhilip Guenthe
a vforked child behave correctly. Have the parent in a vfork() wait on a (different) flag in *its* process instead of the child to prevent a possible use-after-free. When ktracing the child return from a fork, call it rfork if an rthread was created. ok blambert@
2011-03-23Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.Paul Irofti
Discussed and okay drahn@. Okay deraadt@.
2011-03-11Use _MACHINE_ENDIAN_H_ for this is The Right Thing To Do.Paul Irofti
Okay guenther@, millert@.
2011-01-05Pass pmap_bootstrap() the memory range used by the PROM/BUG/firmware/whatever,Miod Vallat
instead of assuming it is ``everything below the kernel image''.
2011-01-05Minor optimizations:Miod Vallat
- move pte validity checks from pmap_remove_pte() to its callers. - when iterating over a segment, compute pte address once and increment it in the loop, instead of recomputing it on every iteration.
2011-01-05Make copypage() and zeropage() per-cpu function pointers, and use aMiod Vallat
different version on 88110, which does load allocate of to-be-completely-overwritten cache lines.
2011-01-05Now that pmap_copy_page() no longer needs to flush a couple contiguous tlbMiod Vallat
entries, drop the count parameter to cmmu_tlb_inv(), and introduce cmmu_tlb_inv_all() to drop all user tlb entries (to be used during context switches).
2011-01-03Rework backtrace code, and try to cope with variadic functions betterMiod Vallat
(those play nasty games with the stack pointer).
2011-01-02Kill pmap_table_t typedef.Miod Vallat
2011-01-01Now that we __HAVE_PMAP_DIRECT, it gets easy to simply save partial cacheMiod Vallat
lines and restore them after invalidating rounded-to-cacheline-boundary ranges.
2010-12-31Massive overhauling of the m88k pmap, though I can't pretend it's a new pmapMiod Vallat
since a large part of the structures and logic remains. Since m88k has separate supervisor/user spaces, we can map physical memory 1:1 in supervisor space, and have the kernel virtual address space start from the end of physical memory. This allows us to switch to __HAVE_PMAP_DIRECT. And to get rid of the double mapped sdt, since now their virtual and physical addresses will always match. The upper bound of the kernel virtual memory space is now platform dependent, until the code which relies upon some hardware devices being mapped 1:1 in supervisor mode is updated to no longer require this (this is mainly a PITA on luna88k, where onboard devices start at 0x40000000, leaving only 1GB of KVA at the moment - still much better than the previous 512MB). Tested on mvme88k only (187, 188, 197LE, 197DP). Other platforms ought to work, aviion will be checked shortly and fixed if necessary. No known OpenBSD/luna88k system in working condition at the moment.
2010-12-31Handle writethrough mappings (as opposed to writeback) better:Miod Vallat
- a writeback->writethrough downgrade only requires a cache writeback, not a writeback and invalidate. - apparently the 88200 does not behave correctly (i.e. according to its documentation) when a given page is accessed with both writethrough and writeback cacheability (even though the cache lines are physically indexed and physically tagged), so make sure to force writeback of writeback pages when they risk being reused as writethrough (hair_count -= MAXHAIR). Better coherency in page table backing store cacheability: these need to be cache invalidated on 88100+88200 (because of hardware update of modified and used pte bits), and writethrough on 88110.
2010-12-31Yet another rework of the cache flushing routines. Fixes some bugs, probablyMiod Vallat
introduces new ones as well. Main highlights are: - 88200 lines which got marked as unusable by the BUG selftests will not be reenabled at CMMU initialization time. - better granularity in the 88110/88410 routines, to operate on ranges closer to the actual requested area, errata permitting.
2010-12-31Introduce a new cmmu routine, for page writebacks without invalidate. Will beMiod Vallat
used two commits from now.
2010-12-31Standardize cache handling functions and defines to use wb/wbinv/inv insteadMiod Vallat
of flush/sync/inval. No functional change.
2010-12-31In db_write_bytes(), cope with memory addresses mapped by the two hardwiredMiod Vallat
88200 BATC entries, and don't bother trying to flip pte bits in that case.
2010-12-31Provide a lint-friendly __va_copy(), as done on all other platforms.Miod Vallat
2010-12-27Do not issue a cache maintainance operation until the last one is notMiod Vallat
completed; this used to be the case, but revision 1.25 of this file, close to four years ago, changed this behaviour by mistake. The side effects of this mishandling of the cache did not show up until the kernel memory allocation strategy moved towards fast reuse of freed pages. Took me a while to track this down, maybe I'm getting too old to write code, I probably should write backdoors instead.
2010-12-26Misplaced splx() in pmap_unsetbit().Miod Vallat
2010-12-26Kill pmap_phys_address(), and force every driver's mmap() routine to returnMiod Vallat
a physical address [more precisely, something suitable to pass to pmap_enter()'sphysical address argument]. This allows MI drivers to implement mmap() routines without having to know about the pmap_phys_address() implementation and #ifdef obfuscation.
2010-12-23The exception vector page on m88k systems has always been the same page asMiod Vallat
the one used by the firmware, which (at least on mvme88k) is at address zero. This is unfortunate, since this means that NULL pointer dereferences in the kernel are not caught, and writes cause havoc. This behaviour was necessary to be able to use the PROM system call interface during early bootstrap, without having to disassemble the VBR page and update branches - which use pc-relative displacement - if we were to use a different VBR address. On mvme88k, change this and actually set up two VBR pages: one, over the PROM page (except for the system call vectors), and another one in the kernel image (which will be mapped read-only). We'll run with the PROM page until the end of autoconf, and then switch to the kernel one, and unmap all the PROM below it. As a bonus, the final kernel page can use optimized data access fault handlers, which do not have to check for faults caused by badaddr(), since badaddr() is only used during device probe on buses which do not support hotplug. There are a few infrastructure collateral damage on aviion and luna88k, but these ports do not change their behaviour yet.
2010-12-23Check for pcb_onfault being set for genuine kernel data faults, copyout()Miod Vallat
may be invoked with an address under the kernel text and we're about to stop having such pages always mapped.
2010-12-23Make the pte created by pmap_map() wired, and count them in pmap_kernel()'sMiod Vallat
statistics. This allows these mappings to be removed with pmap_kremove() without messing with accounting.
2010-12-21Convert netisr to a normal soft interrupt instead of hanving MD codeClaudio Jeker
for it. This makes the netisr a real C function which will help further development. No noticable performance change on i386 and amd64. With input from kettenis@ and miod@ additional OKs mikeb@ and henning@
2010-12-20KNFMiod Vallat
2010-12-20mvme88k kernels running on 88110 systems have been prone to panicing forMiod Vallat
``invalid opcode'' in kernel mode after being idle for a few hours, since many months already. This panic does not make sense. Recently, I've been able to gather enough samples and, looking at the instructions surrounding the panic location, I have narrowed a pattern, and I'll conveniently blame these panics upon a (to the best of my knowledge) new genuine 88110 bug. The exception handler will now recognize this situation and apply a large hammer of workaround - probably not the best workaround that could be devised, but it's short, easy to implement, and works 100% of the time so far. Besides, since the machine is idle, who cares as long as it keeps running? (the curious reader will find more information in the trap.c comments)
2010-12-15oops, i forgot to check in the BRKSIZ define in uvm, but deraadt thinksTed Unangst
its better as a per arch MD define anyway. all default to MAXDSIZ as before.
2010-11-27Remove ddb single-step load and store counters. Most platforms do notMiod Vallat
implement them, and they are of questionable usefulness.
2010-11-18Declare pmap_proc_iflush() in <uvm/uvm_pmap.h> unless <machine/pmap.h>Miod Vallat
provides an inline version of it.
2010-09-28Implement a per-cpu held mutex counter if DIAGNOSTIC on all non-x86 platforms,Miod Vallat
to complete matthew@'s commit of a few days ago, and drop __HAVE_CPU_MUTEX_LEVEL define. With help from, and ok deraadt@.
2010-06-27Bunch of include adjustements to restore compilability.Miod Vallat
2010-06-26Don't #include <sys/user.h> into files that don't need the stuffPhilip Guenthe
it defines. In some cases, this means pulling in uvm.h or pcb.h instead, but most of the inclusions were just noise. Tested on alpha, amd64, armish, hppa, i386, macpcc, sgi, sparc64, and vax, mostly by krw and naddy. ok krw@
2010-06-22Don't play with cacheability in vmapbuf() - pmap_enter() knows what it does.Miod Vallat
This is a leftover from a very old workaround for a very old and long gone pmap_enter() bug.
2010-06-22Since our caches are snooping, we only need to broadcast cache invalidatesMiod Vallat
on 88110 designs. Brings a ~8% speedup on GENERIC.MP on 197DP.
2010-05-09hander -> handlerJasper Lievisse Adriaanse
ok miod@
2010-05-02Precompute the userland process apr cache bits into a global variable.Miod Vallat
On AViiON systems with the 6:1 CMMU:CPU configuration, force cached mappings to be writethrough - this probably hides a bug in the code, but that's the only way so far to get such a system running stably.
2010-04-25Update various comments.Miod Vallat
2010-04-21<sys/systm.h> required now.Miod Vallat