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2007-04-18Use atomic operations to change the pending software interrupt mask.Miod Vallat
2007-03-22In cmmu routines, replace splhigh() with disable_interrupts(), saves a functionMiod Vallat
pointer indirection for a similar result; also move the interrupt disabling code to the public routines, so that we do not end altering the psr more than necessary.
2007-03-21Map the kernel text read only. Because we can.Miod Vallat
2007-03-21Uninitialized variable in db_write_bytes().Miod Vallat
2007-03-21Real atomic_{set,clear}bits_int implementation, ok deraadtMiod Vallat
2007-03-15Since p_flag is often manipulated in interrupts and without biglockArtur Grabowski
it's a good idea to use atomic.h operations on it. This mechanic change updates all bit operations on p_flag to atomic_{set,clear}bits_int. Only exception is that P_OWEUPC is set by MI code before calling need_proftick and it's automatically cleared by ADDUPC. There's no reason for MD handling of that flag since everyone handles it the same way. kettenis@ ok
2007-02-19only make this interface available to the kernel for now, discussed withaTheo de Raadt
rt and such; tested and ok miod drahn
2007-02-11Rework the cache handling routines again. We now try to operate on the exactMiod Vallat
address range we've been given, rounded to cache line boundaries, instead of being lazy and operating on pages as soon as the range was large enough. Also, since the ranges we'll be invoked for are reasonably small, it does not make sense to check for segment sizes - we're always smaller, really. While there, hardcode the size in cmmu_flush_data_cache(), which becomes cmmu_flush_data_page(), since it was always invoked for complete pages.
2007-02-11Shuffle code around so that optimization of the m88110_trap() return getsMiod Vallat
computed correctly.
2007-02-06Add machine/atomic.h to all architectures and define two operationsArtur Grabowski
right now that are supposed to be atomic with respect to interrupts and SMP: atomic_setbits_int and atomic_clearbits_int. All architectures other than i386 and amd64 get dummy implementations since at first we'll be replacing operations that are done with "a |= bit" and "a &= ~bit" today. More proper implementations will follow kettenis@, miod@ ok
2007-01-13Bring back a <machine/frame.h> for m88k platforms, by splitting <machine/pcb.h>Miod Vallat
in its exception-related contents and pcb-related contents.
2007-01-12Change the secondary CMMU's data cache turn on so that do not hog theKenji Aoyama
bus while they spin, as same as 3.8. This have been missed since CMMU initialize cleanup. Also m88k_cpus[] should have 4 elements on luna88k, even in non-MULTIPROCESSOR kernel. ok miod@
2006-12-24Define PROC_PC. Then, since profiling information is being reported inMiod Vallat
statclock(), do not bother doing this in userret() anymore. As a result, userret() does not need its pc and ticks arguments, simplify.
2006-12-24Check for want_resched when processing AST and nowhere else. But then, whenMiod Vallat
doing so, do not check for signals - userret() will do this.
2006-11-29Remove cpu_swapin() and cpu_swapout(), they are no longer necessary (exceptMiod Vallat
for cpu_swapin() on hppa* which is kept).
2006-11-22Be more generous with interrupt disabling in the scheduler.Miod Vallat
2006-11-22The softintr lock needs to be an __mp_lock, not a __cpu_simple_lock.Miod Vallat
2006-11-20In syscall handlers, fix copyin() failure path wrt locking macros.Miod Vallat
2006-11-19You know you're getting too old to code when you're finding stupid bugsMiod Vallat
months later. Here, we would service ast based on p != NULL, instead of p->p_md.md_astpending != 0...
2006-11-18On 88100 systems which do not need the xxx.usr instruction workaround,Miod Vallat
override the DAE helper routines with workaroundless code while the kernel text is still writable.
2006-11-18Rework the PFSR register analysis code on mvme88k: split it into fourMiod Vallat
independent subfunctions, turn PFSR_SAVE into a couple of NOP, and replace them early at runtime with a branch to the selected routine, which will return to pfsr_save. This is really better for 188 systems.
2006-11-18Stop saving and restoring the current ipl in the pcb when switching processes,Miod Vallat
since we know we are at splsched().
2006-11-18Unwaste two delay slots in kcopy().Miod Vallat
2006-11-18In mtx_leave(), jump to the leaf splx() instead of building a frame andMiod Vallat
calling it.
2006-11-18No need to use xmem when unlocking a simple_lock.Miod Vallat
2006-11-17Move m88k memory copy and fill functions to libkern. The copy functions willMiod Vallat
no longer share the same code, but will be instead be duplicated from the same source, so that bcopy() and memcpy() do not need to check for overlap, and memcpy() and memmove() are shorter.
2006-11-16Ratibibugle struct frame and <machine/frame.h>Miod Vallat
2006-11-10Avoid an unnecessary branch for byte-by-byte copyin() and copyout().Miod Vallat
2006-11-10Fetch syscall arguments beyond r9 with copyin() from the userland stack,Miod Vallat
instead of having the userland syscall code put the first three locations from the stack in r10-r12. This will speed-up most of the system calls (but mmap) once these fetches are removed, in a few weeks from now.
2006-06-23consistantly count context switches on exit; miod@ okMichael Shalayeff
2006-06-04When VM_PHYSSEG_MAX is 1, use VM_PSTRAT_RANDOM for VM_PHYSSEG_STRAT, thisMiod Vallat
makes uvm_page.o smaller.
2006-06-01CACHE_GLOBAL is enforced at the APR level, no need to propagate it intoMiod Vallat
the individual PTEs. No functional change.
2006-06-01Better test for cacheability of the previous mapping in pmap_cache_ctrl()Miod Vallat
2006-05-25When looping over va ranges, do not compute the same sdt pointer more thanMiod Vallat
once.
2006-05-21kvtopte() is not used anymore.Miod Vallat
2006-05-20Crank VM_MAX_ADDRESS to 4GB minus one page now that pmap will accept it.Miod Vallat
2006-05-20Make sure pmap copes with address wraparounds when operating on ranges.Miod Vallat
This removes the dependency for VM_MAX_ADDRESS to be aligned on a segment boundary. While there, remove a few internal pmap macros from mmu.h.
2006-05-20Directly pass a pmap to flush_atc_entry() instead of individual fields of it.Miod Vallat
No functional change.
2006-05-19INTSTACK_SIZE is not used anymore.Miod Vallat
2006-05-15Wrong routine for reserved vector 0x0f.Miod Vallat
2006-05-14Missing semicolon, found by deraadtMiod Vallat
2006-05-08Replace gazillions of badvaddr() or badwordaddr() calls with badaddr() calls.Miod Vallat
With a few prototype declarations shuffling, this finally allows <machine/locore.h> to die.
2006-05-08Optimize bsr + br sequences commonly found in the individual trap handlers,Miod Vallat
save one cycle and some pipeline costs per trap.
2006-05-08Clean the internal m88k trap type codes; while there, simplify andMiod Vallat
factorize the build of the VBR page betweem luna88k and mvme88k. Tested by aoyama@ and I.
2006-05-07Move the userland stack at the top of the userland address space.Miod Vallat
2006-05-07Nuke TRACE_DEBUG code. Half of it was useless, and the other half was eitherMiod Vallat
not smart enough to cope with gcc -O2 or with the no longer fixed address for the kernels stack.
2006-05-06On 88100-based systems, take the two hardwired BATC into account inMiod Vallat
pmap_extract(), and do not bother creating regular page table mappings for obio regions which are covered by these BATC entries.
2006-05-04scaled version of ld.d and st.d is obviously not a 64 bit transaction,Miod Vallat
so there is no need to take care of it in double_reg_fixup(), as it will never trigger the kind of misalignment faults this function recovers from. Doh!
2006-05-04Even better control register name display logic.Miod Vallat
2006-05-04Document the 88110 extended (80-bit) floating point format.Miod Vallat
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