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2006-11-20In syscall handlers, fix copyin() failure path wrt locking macros.Miod Vallat
2006-11-19You know you're getting too old to code when you're finding stupid bugsMiod Vallat
months later. Here, we would service ast based on p != NULL, instead of p->p_md.md_astpending != 0...
2006-11-18On 88100 systems which do not need the xxx.usr instruction workaround,Miod Vallat
override the DAE helper routines with workaroundless code while the kernel text is still writable.
2006-11-18Rework the PFSR register analysis code on mvme88k: split it into fourMiod Vallat
independent subfunctions, turn PFSR_SAVE into a couple of NOP, and replace them early at runtime with a branch to the selected routine, which will return to pfsr_save. This is really better for 188 systems.
2006-11-18Stop saving and restoring the current ipl in the pcb when switching processes,Miod Vallat
since we know we are at splsched().
2006-11-18Unwaste two delay slots in kcopy().Miod Vallat
2006-11-18In mtx_leave(), jump to the leaf splx() instead of building a frame andMiod Vallat
calling it.
2006-11-18No need to use xmem when unlocking a simple_lock.Miod Vallat
2006-11-17Move m88k memory copy and fill functions to libkern. The copy functions willMiod Vallat
no longer share the same code, but will be instead be duplicated from the same source, so that bcopy() and memcpy() do not need to check for overlap, and memcpy() and memmove() are shorter.
2006-11-16Ratibibugle struct frame and <machine/frame.h>Miod Vallat
2006-11-10Avoid an unnecessary branch for byte-by-byte copyin() and copyout().Miod Vallat
2006-11-10Fetch syscall arguments beyond r9 with copyin() from the userland stack,Miod Vallat
instead of having the userland syscall code put the first three locations from the stack in r10-r12. This will speed-up most of the system calls (but mmap) once these fetches are removed, in a few weeks from now.
2006-06-23consistantly count context switches on exit; miod@ okMichael Shalayeff
2006-06-04When VM_PHYSSEG_MAX is 1, use VM_PSTRAT_RANDOM for VM_PHYSSEG_STRAT, thisMiod Vallat
makes uvm_page.o smaller.
2006-06-01CACHE_GLOBAL is enforced at the APR level, no need to propagate it intoMiod Vallat
the individual PTEs. No functional change.
2006-06-01Better test for cacheability of the previous mapping in pmap_cache_ctrl()Miod Vallat
2006-05-25When looping over va ranges, do not compute the same sdt pointer more thanMiod Vallat
once.
2006-05-21kvtopte() is not used anymore.Miod Vallat
2006-05-20Crank VM_MAX_ADDRESS to 4GB minus one page now that pmap will accept it.Miod Vallat
2006-05-20Make sure pmap copes with address wraparounds when operating on ranges.Miod Vallat
This removes the dependency for VM_MAX_ADDRESS to be aligned on a segment boundary. While there, remove a few internal pmap macros from mmu.h.
2006-05-20Directly pass a pmap to flush_atc_entry() instead of individual fields of it.Miod Vallat
No functional change.
2006-05-19INTSTACK_SIZE is not used anymore.Miod Vallat
2006-05-15Wrong routine for reserved vector 0x0f.Miod Vallat
2006-05-14Missing semicolon, found by deraadtMiod Vallat
2006-05-08Replace gazillions of badvaddr() or badwordaddr() calls with badaddr() calls.Miod Vallat
With a few prototype declarations shuffling, this finally allows <machine/locore.h> to die.
2006-05-08Optimize bsr + br sequences commonly found in the individual trap handlers,Miod Vallat
save one cycle and some pipeline costs per trap.
2006-05-08Clean the internal m88k trap type codes; while there, simplify andMiod Vallat
factorize the build of the VBR page betweem luna88k and mvme88k. Tested by aoyama@ and I.
2006-05-07Move the userland stack at the top of the userland address space.Miod Vallat
2006-05-07Nuke TRACE_DEBUG code. Half of it was useless, and the other half was eitherMiod Vallat
not smart enough to cope with gcc -O2 or with the no longer fixed address for the kernels stack.
2006-05-06On 88100-based systems, take the two hardwired BATC into account inMiod Vallat
pmap_extract(), and do not bother creating regular page table mappings for obio regions which are covered by these BATC entries.
2006-05-04scaled version of ld.d and st.d is obviously not a 64 bit transaction,Miod Vallat
so there is no need to take care of it in double_reg_fixup(), as it will never trigger the kind of misalignment faults this function recovers from. Doh!
2006-05-04Even better control register name display logic.Miod Vallat
2006-05-04Document the 88110 extended (80-bit) floating point format.Miod Vallat
2006-05-03Overhaul of the disassembler code, with random fixes, better conditionnalMiod Vallat
branches decoding, correct control register descriptions, and (the reason for these changes in the first place) 88110 instruction support. ddb will now disassemble by default for the processor it is running for, and using the alternate format (x/I) disassembles for the other.
2006-05-03Fix a (documented) logic botch in inst_load().Miod Vallat
2006-05-02Replace db_{disable,enable}_interrupts with expanded version of themselves,Miod Vallat
having macros for this is not worth doing.
2006-04-26In vmapbuf(), instead of invoking pmap_cache_ctrl() for each page, postponeMiod Vallat
the call and process the whole range once.
2006-04-26In pmap_cache_ctrl(), do not flush cache if the previous mapping wasMiod Vallat
cache inhibited; from the AV tree.
2006-04-17Save pointers to up to four CMMU PFSR registers into the cpu_info structure.Miod Vallat
This allows the exception handling code to skip the PFSR address computations. The net result is that the PFSR_SAVE code becomes much simpler and smaller, and that all processors will now spend time in PFSR_SAVE - previously, cpu0 was favored and other processors took a bit more time. Note that 8:1 configurations do not use these fields - but then this is a fixed monoprocessor configuration, for which the existing code was already doing The Right Thing. Tested on luna88k (2:1) by aoyama@, and on mvme88k (2:1 and 4:1) by me.
2006-04-15Simplify MMU type printing.Miod Vallat
2006-04-15nmihand() is mvme88k only, move it out of m88k common area.Miod Vallat
2006-04-09On MVME188 systems with more than two CMMUs par CPU, do not honor theMiod Vallat
address split scheme when operating on caches, as this does not work (probably for some snooping needs?); TLB operations are still honoring the split and are not affected.
2006-04-09#ifdef lint wraps for va_startTheo de Raadt
2006-03-19remove unused bdbtofsb(bn) macroMartin Reindl
found by drahn@
2006-03-13remove splimp.Brad Smith
ok miod@
2006-01-13Make size_t, ssize_t, intptr_t and uintptr_t consistent amongst ourTodd C. Miller
architectures. They are now defined as unsigned long, long, long and unsigned long respectively.
2006-01-10Remove duplicate _C_LABEL define. OK miod@Todd C. Miller
2006-01-09Fix last change; we need machine/reg.h for struct sigcontext toTodd C. Miller
be fully defined.
2006-01-08Expose struct sigcontext, struct sigstat and struct sigaltstack for XPG4.2Todd C. Miller
2006-01-06Don't redefine SIZE_MAXTodd C. Miller