| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-02-19 | only make this interface available to the kernel for now, discussed witha | Theo de Raadt | |
| rt and such; tested and ok miod drahn | |||
| 2007-02-11 | Rework the cache handling routines again. We now try to operate on the exact | Miod Vallat | |
| address range we've been given, rounded to cache line boundaries, instead of being lazy and operating on pages as soon as the range was large enough. Also, since the ranges we'll be invoked for are reasonably small, it does not make sense to check for segment sizes - we're always smaller, really. While there, hardcode the size in cmmu_flush_data_cache(), which becomes cmmu_flush_data_page(), since it was always invoked for complete pages. | |||
| 2007-02-11 | Shuffle code around so that optimization of the m88110_trap() return gets | Miod Vallat | |
| computed correctly. | |||
| 2007-02-06 | Add machine/atomic.h to all architectures and define two operations | Artur Grabowski | |
| right now that are supposed to be atomic with respect to interrupts and SMP: atomic_setbits_int and atomic_clearbits_int. All architectures other than i386 and amd64 get dummy implementations since at first we'll be replacing operations that are done with "a |= bit" and "a &= ~bit" today. More proper implementations will follow kettenis@, miod@ ok | |||
| 2007-01-13 | Bring back a <machine/frame.h> for m88k platforms, by splitting <machine/pcb.h> | Miod Vallat | |
| in its exception-related contents and pcb-related contents. | |||
| 2007-01-12 | Change the secondary CMMU's data cache turn on so that do not hog the | Kenji Aoyama | |
| bus while they spin, as same as 3.8. This have been missed since CMMU initialize cleanup. Also m88k_cpus[] should have 4 elements on luna88k, even in non-MULTIPROCESSOR kernel. ok miod@ | |||
| 2006-12-24 | Define PROC_PC. Then, since profiling information is being reported in | Miod Vallat | |
| statclock(), do not bother doing this in userret() anymore. As a result, userret() does not need its pc and ticks arguments, simplify. | |||
| 2006-12-24 | Check for want_resched when processing AST and nowhere else. But then, when | Miod Vallat | |
| doing so, do not check for signals - userret() will do this. | |||
| 2006-11-29 | Remove cpu_swapin() and cpu_swapout(), they are no longer necessary (except | Miod Vallat | |
| for cpu_swapin() on hppa* which is kept). | |||
| 2006-11-22 | Be more generous with interrupt disabling in the scheduler. | Miod Vallat | |
| 2006-11-22 | The softintr lock needs to be an __mp_lock, not a __cpu_simple_lock. | Miod Vallat | |
| 2006-11-20 | In syscall handlers, fix copyin() failure path wrt locking macros. | Miod Vallat | |
| 2006-11-19 | You know you're getting too old to code when you're finding stupid bugs | Miod Vallat | |
| months later. Here, we would service ast based on p != NULL, instead of p->p_md.md_astpending != 0... | |||
| 2006-11-18 | On 88100 systems which do not need the xxx.usr instruction workaround, | Miod Vallat | |
| override the DAE helper routines with workaroundless code while the kernel text is still writable. | |||
| 2006-11-18 | Rework the PFSR register analysis code on mvme88k: split it into four | Miod Vallat | |
| independent subfunctions, turn PFSR_SAVE into a couple of NOP, and replace them early at runtime with a branch to the selected routine, which will return to pfsr_save. This is really better for 188 systems. | |||
| 2006-11-18 | Stop saving and restoring the current ipl in the pcb when switching processes, | Miod Vallat | |
| since we know we are at splsched(). | |||
| 2006-11-18 | Unwaste two delay slots in kcopy(). | Miod Vallat | |
| 2006-11-18 | In mtx_leave(), jump to the leaf splx() instead of building a frame and | Miod Vallat | |
| calling it. | |||
| 2006-11-18 | No need to use xmem when unlocking a simple_lock. | Miod Vallat | |
| 2006-11-17 | Move m88k memory copy and fill functions to libkern. The copy functions will | Miod Vallat | |
| no longer share the same code, but will be instead be duplicated from the same source, so that bcopy() and memcpy() do not need to check for overlap, and memcpy() and memmove() are shorter. | |||
| 2006-11-16 | Ratibibugle struct frame and <machine/frame.h> | Miod Vallat | |
| 2006-11-10 | Avoid an unnecessary branch for byte-by-byte copyin() and copyout(). | Miod Vallat | |
| 2006-11-10 | Fetch syscall arguments beyond r9 with copyin() from the userland stack, | Miod Vallat | |
| instead of having the userland syscall code put the first three locations from the stack in r10-r12. This will speed-up most of the system calls (but mmap) once these fetches are removed, in a few weeks from now. | |||
| 2006-06-23 | consistantly count context switches on exit; miod@ ok | Michael Shalayeff | |
| 2006-06-04 | When VM_PHYSSEG_MAX is 1, use VM_PSTRAT_RANDOM for VM_PHYSSEG_STRAT, this | Miod Vallat | |
| makes uvm_page.o smaller. | |||
| 2006-06-01 | CACHE_GLOBAL is enforced at the APR level, no need to propagate it into | Miod Vallat | |
| the individual PTEs. No functional change. | |||
| 2006-06-01 | Better test for cacheability of the previous mapping in pmap_cache_ctrl() | Miod Vallat | |
| 2006-05-25 | When looping over va ranges, do not compute the same sdt pointer more than | Miod Vallat | |
| once. | |||
| 2006-05-21 | kvtopte() is not used anymore. | Miod Vallat | |
| 2006-05-20 | Crank VM_MAX_ADDRESS to 4GB minus one page now that pmap will accept it. | Miod Vallat | |
| 2006-05-20 | Make sure pmap copes with address wraparounds when operating on ranges. | Miod Vallat | |
| This removes the dependency for VM_MAX_ADDRESS to be aligned on a segment boundary. While there, remove a few internal pmap macros from mmu.h. | |||
| 2006-05-20 | Directly pass a pmap to flush_atc_entry() instead of individual fields of it. | Miod Vallat | |
| No functional change. | |||
| 2006-05-19 | INTSTACK_SIZE is not used anymore. | Miod Vallat | |
| 2006-05-15 | Wrong routine for reserved vector 0x0f. | Miod Vallat | |
| 2006-05-14 | Missing semicolon, found by deraadt | Miod Vallat | |
| 2006-05-08 | Replace gazillions of badvaddr() or badwordaddr() calls with badaddr() calls. | Miod Vallat | |
| With a few prototype declarations shuffling, this finally allows <machine/locore.h> to die. | |||
| 2006-05-08 | Optimize bsr + br sequences commonly found in the individual trap handlers, | Miod Vallat | |
| save one cycle and some pipeline costs per trap. | |||
| 2006-05-08 | Clean the internal m88k trap type codes; while there, simplify and | Miod Vallat | |
| factorize the build of the VBR page betweem luna88k and mvme88k. Tested by aoyama@ and I. | |||
| 2006-05-07 | Move the userland stack at the top of the userland address space. | Miod Vallat | |
| 2006-05-07 | Nuke TRACE_DEBUG code. Half of it was useless, and the other half was either | Miod Vallat | |
| not smart enough to cope with gcc -O2 or with the no longer fixed address for the kernels stack. | |||
| 2006-05-06 | On 88100-based systems, take the two hardwired BATC into account in | Miod Vallat | |
| pmap_extract(), and do not bother creating regular page table mappings for obio regions which are covered by these BATC entries. | |||
| 2006-05-04 | scaled version of ld.d and st.d is obviously not a 64 bit transaction, | Miod Vallat | |
| so there is no need to take care of it in double_reg_fixup(), as it will never trigger the kind of misalignment faults this function recovers from. Doh! | |||
| 2006-05-04 | Even better control register name display logic. | Miod Vallat | |
| 2006-05-04 | Document the 88110 extended (80-bit) floating point format. | Miod Vallat | |
| 2006-05-03 | Overhaul of the disassembler code, with random fixes, better conditionnal | Miod Vallat | |
| branches decoding, correct control register descriptions, and (the reason for these changes in the first place) 88110 instruction support. ddb will now disassemble by default for the processor it is running for, and using the alternate format (x/I) disassembles for the other. | |||
| 2006-05-03 | Fix a (documented) logic botch in inst_load(). | Miod Vallat | |
| 2006-05-02 | Replace db_{disable,enable}_interrupts with expanded version of themselves, | Miod Vallat | |
| having macros for this is not worth doing. | |||
| 2006-04-26 | In vmapbuf(), instead of invoking pmap_cache_ctrl() for each page, postpone | Miod Vallat | |
| the call and process the whole range once. | |||
| 2006-04-26 | In pmap_cache_ctrl(), do not flush cache if the previous mapping was | Miod Vallat | |
| cache inhibited; from the AV tree. | |||
| 2006-04-17 | Save pointers to up to four CMMU PFSR registers into the cpu_info structure. | Miod Vallat | |
| This allows the exception handling code to skip the PFSR address computations. The net result is that the PFSR_SAVE code becomes much simpler and smaller, and that all processors will now spend time in PFSR_SAVE - previously, cpu0 was favored and other processors took a bit more time. Note that 8:1 configurations do not use these fields - but then this is a fixed monoprocessor configuration, for which the existing code was already doing The Right Thing. Tested on luna88k (2:1) by aoyama@, and on mvme88k (2:1 and 4:1) by me. | |||
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