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path: root/sys/arch/mips64/include
AgeCommit message (Expand)Author
2010-05-23#ifdef arc is just too common, but I don't know how to extract this correctlyTheo de Raadt
2010-05-08Huge work-in-progress commit to support Loongson 2E-based evaluation boardsMiod Vallat
2010-04-28Storeing current cpu_info address into LLAddr register, for curcpu().Takuya ASADA
2010-04-21more cleanup to cope with the change that tries to make proc.h not actTheo de Raadt
2010-03-07Correct layout of arc_config{,64} and order of items in enum arc_config_type.Miod Vallat
2010-03-03Store ARCBios variables before machine specific setup is performed andJoel Sing
2010-03-02Add support for the Lemote Lynloong all-in-one PC (basically a Fuloong withoutMiod Vallat
2010-03-01- properly spell 'exception' in commentsJasper Lievisse Adriaanse
2010-02-28Pass L2 cache size in struct cpu_hwinfo, so that bootstrap of secondaryMiod Vallat
2010-02-28Add an explicit `delay constant' member to struct cpu_info, so that it canMiod Vallat
2010-02-13Since we don't use the saved ipl in pcb anymore, remove it from the structMiod Vallat
2010-02-11fuloong model defineOtto Moerbeek
2010-02-05Blind support for the EMTEC Gdium Liberty netbook. Per-platform configurationMiod Vallat
2010-02-02Skip calling smp_rendezvous if it's not necessary.Takuya ASADA
2010-01-28The RA stack control bit on the loongson2 diagnostic register is not a clearMiod Vallat
2010-01-23Give little-endian fp on mips a change to be handled correctly.Miod Vallat
2010-01-18Define IPL_SCHED as IPL_CLOCK, not IPL_HIGH.Miod Vallat
2010-01-18Make trapdebug code MP-safe.Miod Vallat
2010-01-09Make interrupt depth counters per-cpu.Miod Vallat
2010-01-09Move cache information from global variables to per-cpu_info fields; thisMiod Vallat
2010-01-09Define struct cpu_hwinfo, to hold hardware specific information about eachMiod Vallat
2010-01-08MP-safe FPU handling. ok miod@Takuya ASADA
2010-01-05Dynamic allocation for ASID and ASID generation number on struct pmap. ok miod@Takuya ASADA
2009-12-30curcpu()->ci_curpmap added. ok miod@Takuya ASADA
2009-12-28MP-safe pmap implemented, enable IPI in interrupt handler to avoid deadlock.Takuya ASADA
2009-12-25Pass both the virtual address and the physical address of the memory rangeMiod Vallat
2009-12-13bit less aggressive about hiding; ok miodTheo de Raadt
2009-12-12Protect more definitions userland doesn't need to care about with _KERNELMiod Vallat
2009-12-12Switch page size from 4KB to 16KB on R10k kernels without R5k supportMiod Vallat
2009-12-12unifdef -D__LP64__Miod Vallat
2009-12-11More changes to avoid truncating 64 bit pointers to 32 bits and sign-extendingMiod Vallat
2009-12-08Unconditionnaly move kernel virtual memory space to XKSEG, now that previousMiod Vallat
2009-12-08Use a whole page for msgbuf if page size is larger than 4KB, instead ofMiod Vallat
2009-12-07Sync VM_MIN_ADDRESS with __LDPGSZ again.Miod Vallat
2009-12-07Support for 16KB page size kernels; page size is now set in <machine/param.h>Miod Vallat
2009-12-07If UPAGES would turn out to be 1, instead of using wired TLB entries to mapMiod Vallat
2009-12-07Use a pool to manage pmap pte pages and top level segment table, instead ofMiod Vallat
2009-12-07When converting ARCBios memory spaces from ARCBios page size to the kernelMiod Vallat
2009-11-30Crank __LDPGSZ from 4KB to 16KB, in preparation for a kernel page sizeMiod Vallat
2009-11-27Move MB_LEN_MAX into the machine-independent sys/limits.h header,Philip Guenthe
2009-11-27atomic counter increment for SMP.Takuya ASADA
2009-11-25IP30 IPI implementation.Takuya ASADA
2009-11-24smp_malloc() implemented.Takuya ASADA
2009-11-22SMP support on MIPS clock.Takuya ASADA
2009-11-22Allow mips ports to override VM_{MIN,MAX}_KERNEL_ADDRESS, and provide theMiod Vallat
2009-11-21mplock, rw_cas implementedTakuya ASADA
2009-11-19Rename KSEG* defines to CKSEG* to match their names in 64 bit mode; alsoMiod Vallat
2009-11-19Remove code allowing native binaries with O32 ABI to run, there aren't any...Miod Vallat
2009-11-19Factor triplicated code responsible to add memory information into aMiod Vallat
2009-11-18Stricter type usage (width and signedness); first step towards 64 bit ptes.Miod Vallat