| Age | Commit message (Expand) | Author |
|---|
| 2009-11-07 | Replace option TGT_ORIGIN200 and TGT_ORIGIN2000 with a single option, | Miod Vallat |
| 2009-11-07 | Change sgi system identification from a single system type list, to a smaller | Miod Vallat |
| 2009-11-04 | Get rid of __HAVE_GENERIC_SOFT_INTERRUPTS now that all our platforms support it. | Mark Kettenis |
| 2009-10-30 | Support IP30 secondary cpu bootup. ok miod@ | Takuya ASADA |
| 2009-10-26 | Rename struct confargs to struct mainbus_attach_args for consistency and also | Miod Vallat |
| 2009-10-22 | Completely overhaul interrupt handling on sgi. Cpu state now only stores a | Miod Vallat |
| 2009-10-22 | With the splx() changes, it is no longer necessary to remember which interrupt | Miod Vallat |
| 2009-10-22 | The recent cleanups make blatantly visible that the pending_int handler | Miod Vallat |
| 2009-10-22 | unifdef -DIMASK_EXTERNAL to the mips code. Support for interrupt masking at | Miod Vallat |
| 2009-10-22 | Replace intrmask_t with uint32_t. This types only describes interrupt masks | Miod Vallat |
| 2009-10-22 | Change the #define controlling use of RM7k/RM9k coprocessor 0 ICR to | Miod Vallat |
| 2009-10-22 | Remove a never hit debug panic I commited by accident sometime ago. | Miod Vallat |
| 2009-10-22 | Only play with RM7k coprocessor 0 ICR if IMASK_EXTERNAL is not defined. | Miod Vallat |
| 2009-10-22 | Do not bother invoking hw_setintrmask() in splinit(), spl0() will do it for | Miod Vallat |
| 2009-10-22 | At the end of a context switch and in proc_trampoline(), instead of doing the | Miod Vallat |
| 2009-10-22 | Crank VM_MIN_ADDRESS to prevent userland from being able to mmap zero, | Miod Vallat |
| 2009-10-07 | ipending, cpl moved into cpu_info | Takuya ASADA |
| 2009-09-30 | curproc, curprocpaddr moved into cpu_info | Takuya ASADA |
| 2009-09-27 | Add an implementation of IRIX-compatible cacheflush() routine to mips ports, | Miod Vallat |
| 2009-09-15 | cpu status flag, cpuid added to cpu_info. | Takuya ASADA |
| 2009-08-09 | Use the ANSI/ISO token paste operator. Requested by jsg@ | Joel Sing |
| 2009-08-06 | Make sure <machine/cpu.h> includes <machine/intr.h> when included with _LOCORE | Miod Vallat |
| 2009-08-06 | Work in progress support for Loongson2E/2F processors; need option CPU_LOONGSON2 | Miod Vallat |
| 2009-08-06 | R4k-style coprocessor 0 config register uses 3 bits wide fields to tell | Miod Vallat |
| 2009-08-06 | Remove _InvalidateICachePage cache op, it isn't used by anything. | Miod Vallat |
| 2009-08-06 | Only compile RM7000 performance counter support if defined(RM7K_PERFCNTR). | Miod Vallat |
| 2009-07-23 | Get rid of bus_mem_add_mapping(). | Miod Vallat |
| 2009-07-22 | When disassembling, if our pc matches the beginning of a routine, then | Miod Vallat |
| 2009-07-15 | missing va_end in bios_printf & dioopen. ok miod@ | Martynas Venckus |
| 2009-06-17 | R14000 processors with revision 3 and above are actually R16000 revision | Miod Vallat |
| 2009-06-13 | Enumerate all available nodes for hardware on IP27/IP35 systems; works to some | Miod Vallat |
| 2009-06-10 | Switch sgi to per-process AST, and move ast() from interrupt.c to trap.c | Miod Vallat |
| 2009-06-02 | Add an r10k-specific cop0 control register. | Miod Vallat |
| 2009-05-27 | Rename the ast processing function from softintr() to ast(), to reduce | Miod Vallat |
| 2009-05-25 | Years ago, I fixed an R5000 O2 instability by implementing a workaround for | Miod Vallat |
| 2009-05-22 | Drop almost unused <machine/psl.h> on sgi; move USERMODE() definition from | Miod Vallat |
| 2009-05-21 | Make sure cpu_switchto() returns to the new proc with interrupts enabled (this | Miod Vallat |
| 2009-05-21 | In splinit(), adjust proc0 pcb values, for kthread to start with correct | Miod Vallat |
| 2009-05-21 | Make sure splx() reenables hardware interrupt sources, even there aren't | Miod Vallat |
| 2009-05-19 | Processing AST can trigger more AST. Loop on astpending instead of checking | Miod Vallat |
| 2009-05-16 | Count LoadedProgram regions as free memory, since these are either the boot | Miod Vallat |
| 2009-05-15 | Revert 1.18, the memory bank allocation logic was actually correct, and I | Miod Vallat |
| 2009-05-09 | Promote types in ARCBios function prototypes from int to long whenever | Miod Vallat |
| 2009-05-08 | Be sure to completely ignore ARCBios memory information on IP27 and IP35 | Miod Vallat |
| 2009-05-06 | Fix typo in a comment, and remove 20st-century mention of option | Miod Vallat |
| 2009-05-06 | Fix signedness of comparison used to know whether we have already reached | Miod Vallat |
| 2009-04-25 | Make pmap_steal_memory() return KSEG0 addresses only for kernels linked at | Miod Vallat |
| 2009-04-25 | typo in comments | Miod Vallat |
| 2009-04-19 | Add heuristics to tell IP27 and IP35 apart, as they will need to be handled | Miod Vallat |
| 2009-04-12 | Better constraints on the temporary register in atomic_{set,clear}bits_int. | Miod Vallat |
