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2019-01-14Wrap floating point instructions with .set hardfloat to make clang'sVisa Hankala
integrated assembler accept them in the kernel. Move fsr access code into dedicated inline functions to improve readability.
2019-01-05Expand a macro instruction for clang. Unlike gas, the integratedVisa Hankala
assembler does not handle the large immediate value automatically.
2019-01-05Replace two-operand instruction aliases that clang does notVisa Hankala
understand with the three-operand instructions. No binary change with gas.
2018-12-31Set floating point condition code even if the result of an emulatedVisa Hankala
floating point comparison is unordered. The setting should be skipped only if an invalid operation exception is taken. This fixes incorrect emulated compare behaviour with NaN values. NaN issue on octeon reported by afresh1@; OK miod@
2018-12-13Use a faster, more reliable way to figure out how many TLB entries areVisa Hankala
available on RM7000 processors. From miod@
2018-12-05Include srp.h where struct cpu_info uses srp to avoid erroring out whenJonathan Gray
including cpu.h machine/intr.h etc without first including param.h when MULTIPROCESSOR is defined. ok visa@
2018-12-04Add processor IDs for several OCTEON II and III SoCs.Visa Hankala
2018-10-22More "explicitely" -> "explicitly" in various comments.Kenneth R Westerback
ok guenther@ tb@ deraadt@
2018-09-14Unify and bump some of the NMBCLUSTERS defines. Some archs had it set toClaudio Jeker
4MB which is far too low especially when the platform is able to run MP. New limits are, amd64 = 256M; arm64, mips64, sparc64 = 64M; alpha, arm, hppa, i386, powerpc = 32M; m88k, sh = 8M Still rather conservative numbers but much better than before. At least some hangs of arm64 build boxes was caused by this. OK kettenis@, visa@
2018-07-10Move from sendsig() to its callers the initsiginfo() calls andPhilip Guenther
instead of passing sendsig() the code+type+val, pass a siginfo_t* to copy from. Eliminate the indirection through struct emul for sendsig(); we no longer have a SunOS4-compat version of sendsig() ok deraadt@
2018-06-13Make octeon kernels compile with DEBUG.Visa Hankala
Based on a diff from jj@. Thank you!
2018-05-22Delete antique sigdebug definitionsPhilip Guenther
ok kettenis@
2018-05-09Fix a linking error in the IP26 kernel. This is a regression causedVisa Hankala
by the addition of db_save_stack_trace(). sys/arch/mips64/mips64/trap.c:(.text+0x410): undefined reference to `u_intr' Pointed out by deraadt@
2018-05-09Avoid locking two vm_pages simultaneously in pmap_enter(). To achieveVisa Hankala
that, remove any existing mapping before locking the new vm_page. This fix prevents a deadlock. Issue pointed out by witness(4).
2018-05-09vm_page lookup does not need locking. Hoist it outside the pmap lock.Visa Hankala
2018-05-09Implement stack trace saving on mips64.Visa Hankala
OK mpi@
2018-04-12Implement MAP_STACK option for mmap(). Synchronous faults (pagefault andTheo de Raadt
syscall) confirm the stack register points at MAP_STACK memory, otherwise SIGSEGV is delivered. sigaltstack() and pthread_attr_setstack() are modified to create a MAP_STACK sub-region which satisfies alignment requirements. Observe that MAP_STACK can only be set/cleared by mmap(), which zeroes the contents of the region -- there is no mprotect() equivalent operation, so there is no MAP_STACK-adding gadget. This opportunistic software-emulation of a stack protection bit makes stack-pivot operations during ROPchain fragile (kind of like removing a tool from the toolbox). original discussion with tedu, uvm work by stefan, testing by mortimer ok kettenis
2018-04-09Add a driver for the OCTEON cryptographic unit. It providesVisa Hankala
a hardware-accelerated implementation of several encryption and authentication algorithms for ipsec(4): AES-CBC AES-CTR AES-GCM AES-GMAC HMAC-MD5 HMAC-SHA1 HMAC-SHA2-256 HMAC-SHA2-384 HMAC-SHA2-512 Please note that the driver is currently disabled. OK deraadt@
2018-03-20Do not panic from ddb(4) when a lock requirement isn't fulfilled.Martin Pieuchot
Extend the logic already present for panic() to any DDB-related operation such that if ddb(4) is entered because of a fault or other trap it is still possible to call 'boot reboot'. While here stop printing splassert() messages as well, to not fill the buffer. ok visa@, deraadt@
2018-03-05#define _MAX_PAGE_SHIFT in MD _types.h as the maximum pagesize an archTheo de Raadt
needs (looking at you sgi, but others required this before). This is for the circumstances we need pagesize known at compile time, not getpagesize() runtime. Use it for malloc storage sizes, for shm, and to set pthread stack default sizes. The stack sizes were a mess, and pushing them towards page-aligned is healthy move (which will also be needed by the coming stack register checker) ok guenther kettenis, discussion with stefan
2018-02-24Declare ci_ipl volatile to prevent the compiler from optimizingVisa Hankala
or reordering accesses to the variable. Assume that the assembler preserves the correct sequence of instructions, which allows the removal of the explicit noreorder/reorder toggles from the C code. With ci_ipl being volatile, drop mips_sync() calls that follow the accesses of the variable. The sync is redundant as a compiler barrier. In addition, the MIPS64 CPU designs should not need the sync for pipeline or write buffer control. According to miod@, the use of the instruction is a carryover from code targeting early MIPS designs that lack tight integration with the cache and write buffer. Discussed with and testing help from miod@. Tested on CN5020, CN6120, CN7130, CN7360, Loongson 2F and 3A1000, R4400, R8000, R10000 and R16000.
2018-02-18Replace a full memory barrier with a write-write barrier. The fullVisa Hankala
barrier is overkill when forcing parameter visibility before IPIs.
2018-01-29Drop unused field `ci_ipiih'.Visa Hankala
2018-01-25Remove mutex implementations that now live in MI code.Martin Pieuchot
2018-01-25Move common mutex implementations to a MI place.Martin Pieuchot
Archs not yet converted can to the jump by defining __USE_MI_MUTEX. ok visa@
2018-01-12Unify <machine/mutex.h> a bit further.Martin Pieuchot
`mtx_owner' becomes the first field of 'struct mutex' on i386/amd64/arm64. ok visa@
2018-01-08Move SC_* defines into <machine/setjmp.h>, and rename them,Visa Hankala
so that <machine/signal.h> is not needed in setjmp.S. Suggested by kettenis@ long ago, OK deraadt@
2018-01-06Remove redundant zeroing and dead code.Visa Hankala
2018-01-04Unify <machine/mutex.h> a bit further.Martin Pieuchot
Remove `mtx_lock' from i386, add volatile before `mtx_owner' where it was missing. Inputs from kettenis@, ok visa@
2017-12-30Delete unnecessary <sys/file.h> includesPhilip Guenther
ok millert@ krw@
2017-12-20Sync C mutex implementations.Martin Pieuchot
ok kettenis@
2017-12-14fcntl(F_SETFL) invokes the FIONBIO and FIOASYNC ioctls internally, soPhilip Guenther
the memory devices (/dev/null, /dev/zero, etc) need to permit them. problem noted, tweak, and testing by jeremy@ ok deraadt@
2017-11-19Remove lock_machdep.c from amd64, i386, mips64 and sparc64.Visa Hankala
The architectures have been using the MI mplock for a while. OK deraadt@, kettenis@
2017-10-21Use MI mplock on mips64.Visa Hankala
OK mpi@
2017-10-11Try to make CPU cache size values more correct, especially on OCTEON IIVisa Hankala
and III. The logic does not look nice, but the parameters do not follow the standard config register layout anyway. Remove unnecessary default values, and assume that the Config1 and Config2 registers are available on every CPU. Tested on CN5020, CN6120, CN7130 and CN7360.
2017-09-16Make sure that `fsr' is always initialized. Non-DEBUG kernelsVisa Hankala
have not been affected. From miod@
2017-09-11Sync alpha/mips64/powerpc mutex implementations.Martin Pieuchot
No functionnal change. ok visa@
2017-09-05Move mutex, condvar, and thread-specific data routes, pthread_once, andPhilip Guenther
pthread_exit from libpthread to libc, along with low-level bits to support them. Major bump to both libc and libpthread. Requested by libressl team. Ports testing by naddy@ ok kettenis@
2017-09-02Let the kernel utilize the FPU if one is available, even when theVisa Hankala
FPUEMUL option is enabled. This benefits OCTEON III systems which can run floating-point operations natively. Feedback from and OK miod@; he also helped with testing. Tested on octeon without FPU (CN5020, CN6120) and with FPU (CN7130), as well as on sgi/IP27 (MP R16000), sgi/IP32 (R5000), and loongson (3A1000).
2017-09-01Ansify function definitions.Visa Hankala
2017-09-01Zap stray prototype.Visa Hankala
2017-08-30Prefer copyin32() to copyin() when fetching instructionsVisa Hankala
from user space. This improves performance slightly. Discussed with miod@
2017-08-27Rely on the hardware to clear hazards on octeon.Visa Hankala
2017-08-26Use copyin32() instead of a direct memory load when fetching a branchVisa Hankala
instruction for branch emulation. This ensures the userspace memory access is properly guarded and that TLB faults are handled. In order not to complicate the interface of MipsEmulateBranch(), each caller now has to provide the branch instruction for the function. Feedback from miod@
2017-08-26Use macros for Config1 bits.Visa Hankala
2017-08-25Fix pmap_extract() to return false when there is a page table pageVisa Hankala
but no mapping for the input user virtual address.
2017-08-13Make R_MIPS_* defines available via <machine/reloc.h>.Visa Hankala
OK guenther@
2017-08-12Add a dummy (for now) <machine/reloc.h> for mips64 to fix build.Visa Hankala
OK guenther@
2017-07-30Define MAXCPUS per mips64 port.Visa Hankala
2017-07-22Rename variables for clarity.Visa Hankala
It does not seem necessary to provide initial value for `sicode'. When `signal' gets set, `sicode' is set as well. OK deraadt@, kettenis@
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