| Age | Commit message (Expand) | Author |
|---|
| 2016-11-06 | Add interrupt handling routines for Loongson 3A. | Visa Hankala |
| 2016-10-27 | Revert previous `ncpus' change because the percpu code now works | Visa Hankala |
| 2016-10-26 | Increment `ncpus' to its final value already during autoconfiguration so | Visa Hankala |
| 2016-10-19 | Change pmap_proc_iflush() to take a process instead of a proc | Philip Guenther |
| 2016-10-19 | The first argument to process_domem() and its uio_procp should be curproc | Philip Guenther |
| 2016-10-09 | Do not use MIPS64r2 instructions on Loongson 2. Now, a generic loongson | Visa Hankala |
| 2016-10-08 | Various printf claim to report the PID, so actually report that and not the TID | Philip Guenther |
| 2016-09-25 | Make a move towards ending 4 decades of kernel snooping. | Theo de Raadt |
| 2016-09-19 | fix whitespace at EOL | Jasper Lievisse Adriaanse |
| 2016-09-15 | all pools have their ipl set via pool_setipl, so fold it into pool_init. | David Gwynne |
| 2016-09-06 | Define PTE_* macros in one place. Use the lwu instruction for 32-bit PTE | Visa Hankala |
| 2016-09-03 | Increase the number of mbufs on most architectures. This is based | Alexander Bluhm |
| 2016-08-16 | Remove RM7000/RM9000-specific performance counter code. It originates | Visa Hankala |
| 2016-08-14 | Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUs | Visa Hankala |
| 2016-08-06 | Add PageGrain bits. | Visa Hankala |
| 2016-08-01 | bring the light of ansi to a few more files | Ted Unangst |
| 2016-05-23 | Place a cpu-dependent trap/illegal instruction over the remainder of the | Theo de Raadt |
| 2016-05-21 | hand-massage sendsig() and sys_sigreturn() to be much more similar. | Theo de Raadt |
| 2016-05-11 | Another attempt to make the mips64 pmap MP-safe. Now at least | Visa Hankala |
| 2016-05-10 | SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookie | Theo de Raadt |
| 2016-04-27 | G/C DDB_REGS. | Martin Pieuchot |
| 2016-04-24 | Make pmap_invalidate_*_page() and pmap_update_*_page() operate only on | Visa Hankala |
| 2016-04-24 | Keep pmap_update_{kernel,user}_page() inside pmap.c. | Visa Hankala |
| 2016-04-23 | Sync dcaches and invalidate icaches of all active CPUs of a pmap when | Visa Hankala |
| 2016-03-19 | Reduces the noise around the global ``ticks'' variable by renaming | Martin Pieuchot |
| 2016-03-06 | Rename mips64's trap_frame into trapframe. | Martin Pieuchot |
| 2016-03-01 | guard macro args with parens | mmcc |
| 2016-03-01 | DB_SYM_NULL -> NULL. | Martin Pieuchot |
| 2016-02-27 | Rename kdb_trap() into db_ktrap(). | Martin Pieuchot |
| 2016-02-01 | Zap stray pmap_kenter_cache() prototype. | Visa Hankala |
| 2016-02-01 | Move modify bit emulation into pmap.c to gather pmap C code in one place. | Visa Hankala |
| 2016-01-10 | Back out the MP pmap diff for rework. The code does not work on | Visa Hankala |
| 2016-01-08 | Make sure the new rendezvous state is visible to other CPUs before | Visa Hankala |
| 2016-01-05 | Remove PTE locking from pmap_extract() because it does not add any MP | Visa Hankala |
| 2016-01-05 | Some implementations of HitSyncDCache() call pmap_extract() for va->pa | Visa Hankala |
| 2015-12-31 | Protect mips64 pmap and pvlist structs with a mutex to make pmap | Visa Hankala |
| 2015-12-25 | Make interrupt masking MP-aware. Linux IP27 and IP35 ports served as a | Visa Hankala |
| 2015-11-02 | Only define KERNBASE if defined(_KERNEL), for nothing in userland needs it, | Miod Vallat |
| 2015-09-29 | Use the DMTC0 macro and MTC0_HAZARD in the UPAGES > 1 case. Now R8000 kernel | Miod Vallat |
| 2015-09-27 | Don't forget to put the necessary MFC0_HAZARD in SAVE_CPU. For some reason I | Miod Vallat |
| 2015-09-27 | On R8000, make trap() behave closer to interrupt() when servicing a real | Miod Vallat |
| 2015-09-26 | lint is dead and C99 may be old enough to drive a car: delete LONGLONG | Philip Guenther |
| 2015-09-26 | Add a spinout check to the mips64 mutex, to aid debugging. | Visa Hankala |
| 2015-09-24 | It is no longer necessary to include CR_BERR in CR_INT_MASK if CPU_R8000. | Miod Vallat |
| 2015-09-23 | That PICA reference ought to have been removed 20 years ago! | Miod Vallat |
| 2015-09-23 | In tlb_update(), when inserting an entry for a KV1 address, reuse the | Miod Vallat |
| 2015-09-23 | Reorder subtractions and branches to shave one cycle per call to | Miod Vallat |
| 2015-09-23 | Output operands of movn and movz in the correct order. | Miod Vallat |
| 2015-09-21 | After reading IRIX header files again, add one more SSNOP to MTC0_HAZARD (and | Miod Vallat |
| 2015-09-21 | Fix membar positioning in mtx_enter_try() and (critically!) mtx_leave() | Mark Kettenis |
