| Age | Commit message (Expand) | Author |
|---|
| 2012-09-29 | Basic R8000 processor support. R8000 processors require MMU-specific code, | Miod Vallat |
| 2012-09-29 | Forgot this in previous commit | Miod Vallat |
| 2012-09-29 | Store the base value of coprocessor 0 system register, when running userland, | Miod Vallat |
| 2012-09-29 | Sort cpu and fpu list, and don't bother printing those we don't run on (yet). | Miod Vallat |
| 2012-09-29 | Handle the coprocessor 0 cause and status registers as a 64 bit value now, | Miod Vallat |
| 2012-09-29 | Avoid an unnecessary copyin() call in the SYS__syscall handling path. | Miod Vallat |
| 2012-09-29 | Add a few more coprocessor 0 cause and config registers defines. | Miod Vallat |
| 2012-09-29 | Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlb | Miod Vallat |
| 2012-09-29 | Introduce assembly macros for specific processor hazards: tlb update, status | Miod Vallat |
| 2012-09-29 | Move proc_trampoline, which is not really exception processing, from exception.S | Miod Vallat |
| 2012-09-29 | Provide a few more macros in <machine/asm.h> to wrap coprocessor 0 | Miod Vallat |
| 2012-09-29 | Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions of | Miod Vallat |
| 2012-09-11 | Remove the 'OLF method' used for the transition from a.out to ELF and | Theo de Raadt |
| 2012-08-22 | sigpid should be of type pid_t (only visable with DEBUG). | Okan Demirmen |
| 2012-08-07 | Handle __syscall as syscall, since these are identical on 64-bit platforms, | Miod Vallat |
| 2012-08-07 | Move the common bits of syscall invocation and return handling into | Philip Guenthe |
| 2012-07-14 | Split the existing mips64 clock code into time-of-day and generic duties in | Miod Vallat |
| 2012-07-09 | Do not re-initialize ci_randseed on the primary cpu | Theo de Raadt |
| 2012-06-26 | create new machine/_float.h which is namespace clean. create a new | Theo de Raadt |
| 2012-06-24 | Bring in line with current cache_r{5,10}k.c style, and optimize slightly the | Miod Vallat |
| 2012-06-24 | Since the RM7000 cache behaves as a physically-indexed cache due to the set | Miod Vallat |
| 2012-06-24 | Get the L2 line size from the configuration register instead of hardcoding the | Miod Vallat |
| 2012-06-24 | Do not output unnecessary semicolons when expanding macros. No functional change | Miod Vallat |
| 2012-06-24 | Add cache operation functions pointers to struct cpu_info; the various | Miod Vallat |
| 2012-06-23 | Replace R5000 and R10000 family assembly cache routines with C equivalents, | Miod Vallat |
| 2012-06-23 | Fix ITLBNOPFIX macro definition on RM7000-capable kernels, and use it | Miod Vallat |
| 2012-06-17 | No longer restrict alloc_contiguous_pages() to memory in the low 4GB. | Miod Vallat |
| 2012-06-17 | Using the LLAddr register to store our curcpu() pointer on R10k SMP kernels | Miod Vallat |
| 2012-05-27 | Add a `L2 cache line size' member to struct cpu_info. This allows R4k code to | Miod Vallat |
| 2012-05-27 | Replace Loongson2F assembly cache routines with equivalent C code. This will | Miod Vallat |
| 2012-05-17 | Correct virtual aliasing mask computation. | Miod Vallat |
| 2012-05-10 | The uvm_map() changes introduced about two months ago yield a different | Miod Vallat |
| 2012-04-25 | Skip cache flushes in pmap_zero_page() and pmap_copy_page() on systems | Miod Vallat |
| 2012-04-24 | Harvest some low-hanging fruit in thu R5k/RM7k cache routines: | Miod Vallat |
| 2012-04-24 | Add support for wired mappings, using the last unused bit in the PTE. | Miod Vallat |
| 2012-04-24 | Introduce a #define for the number of PFN bits in a pte, to be used in the | Miod Vallat |
| 2012-04-21 | Correct a wrong comment. | Miod Vallat |
| 2012-04-21 | Rework the signature of the cache handling routines again. It makes more sense | Miod Vallat |
| 2012-04-19 | Print the currently active ASID in `machine tlb' ddb command. | Miod Vallat |
| 2012-04-19 | Be sure to update the currently active ASID in pmap_activate() if invoked on | Miod Vallat |
| 2012-04-16 | Move proc0 and trap handler setup before consinit(), but still wait for the | Miod Vallat |
| 2012-04-16 | Fix struct arc_param_blk_* layout to not embed pointers, as this messes the | Miod Vallat |
| 2012-04-15 | Tell Indy and Challenge S apart. | Miod Vallat |
| 2012-04-11 | The first ktrace record for a newly spawned thread is a return | Mike Belopuhov |
| 2012-04-10 | Count traps and fpu context switches. | Miod Vallat |
| 2012-04-09 | No need to round VCEI addresses, and VCED addresses only need to be rounded | Miod Vallat |
| 2012-04-09 | More errata bandaid for the R4000SC is necessary in the tlb handlers. | Miod Vallat |
| 2012-04-06 | Make the logic for PMAP_PREFER() and the logic, inside pmap, to do the | Miod Vallat |
| 2012-04-06 | Rework IP22 RTC year base computation, again. It turns out that different | Miod Vallat |
| 2012-03-28 | Work in progress support for the SGI Indigo, Indigo 2 and Indy systems | Miod Vallat |
