| Age | Commit message (Collapse) | Author |
|---|
|
non-PMAP_DIRECT systems due to lock recursion.
|
|
sending IPIs. Without this, a rendezvous can fail if write buffering is
enabled on octeon.
|
|
safety. The function has to be called in a context where conflicting
pmap updates cannot happen. Otherwise the returned physical address
might not be valid.
Suggested by kettenis@
|
|
conversion. Because pmap_extract() acquires the PTE mutex, a "locking
against myself" panic is triggered if the cache routine gets called in
a context where the mutex is already held.
In the pmap, all calls to HitSyncDCache() are for a whole page. Add a
new cache routine, HitSyncDCachePage(), which gets both the va and the
pa of a page. This removes the need of the va->pa conversion. The new
routine has the same signature as SyncDCachePage(), allowing reuse of
the same routine for cache implementations that do not need differences
between "Hit" and non-"Hit" routines.
With the diff, POWER Indigo2 R8000 boots multiuser again. Tested on sgi
GENERIC-IP27.MP and octeon GENERIC.MP, too.
Diff from miod@, ok kettenis@
|
|
operations MP-safe. Tested on octeon and sgi (IP27, IP30).
Feedback from kettenis@ long ago
|
|
substitute for hardware documentation.
|
|
and only if not already defined. Allows for KERNBASE to be defined elsewhere.
|
|
have all their m[ft]c0 instructions correctly wrapped.
|
|
had put the MTC0_HAZARD in RESTORE_CPU years ago but forgot their counterparts.
|
|
interrupt by not invoking refreshcreds(), but closer to itsa() when servicing
a trap-reported-as-interrupt by invoking userret() in that case.
No change on !defined(CPU_R8000) kernels.
|
|
comments
ok millert@
|
|
ok kettenis@
|
|
|
|
|
|
current ASID value rather than using zero, so that we can avoid writing
back the ASID on exit (and waste cycles because of expensive coprocessor 0
hazards).
While there, use conditional instructions when picking a random TLB set number,
in order to waste one branch prediction cache entry.
|
|
tfp_inval_icache().
|
|
|
|
remove one from constructs based upon it) when building for R8000.
|
|
Same diff as guenther@ committed for alpha.
ok guenther@
|
|
handler; from Naruaki Etomi (nullnilaki on gmail), thanks!
|
|
the whole I$.
|
|
|
|
genuine FPU exception.
|
|
sgi, are identical. Put one implementation in mips64 and drop the
platform-specific copies, to remove duplicated code.
ok miod@
|
|
|
|
ok deraadt@
|
|
directly on the frame, or any updates will get lost. This went unnoticed for
so long because FPU emulation traps usually use the first frame of the U area,
so values kind of stick.
This fixes a rare occurrence of wrong floating-point values with MP kernels
on Octeon.
ok visa@
|
|
in MP systems.
ok miod@
|
|
|
|
ok miod@
|
|
avoid a potential deadlock.
ok miod@, deraadt@
|
|
ok miod@, deraadt@
|
|
non-blocking. This improves performance on systems that have more than
a few cores and where there is a heavy IPI load. Currently the only
place where coalescing must not happen is rendezvous processing, but
there invocations are serialized by the rendezvous mutex.
ok miod@
|
|
prevent race conditions that could corrupt amap entries, among other
things.
ok miod@ pirofti@
|
|
|
|
this basically copies the sgi implementation to mips64 and removes
it from the rest. this way they get an optimised UP mutex implementation
and correct asserts on all platforms.
ok miod@ jmatthew@
|
|
"shared reference pointers".
srp allows concurrent access to a data structure by multiple cpus
while avoiding interlocking cpu opcodes. it manages its own reference
counts and the garbage collection of those data structure to avoid
use after frees.
internally srp is a twisted version of hazard pointers, which are
a relative of RCU.
jmatthew wrote the bulk of a hazard pointer implementation and
changed bpf to use it to allow mpsafe access to bpfilters. however,
at s2k15 we were trying to apply it to other data structures but
the memory overhead of every hazard pointer would have blown out
significantly in several uses cases. a bulk of our time at s2k15
was spent reworking hazard pointers into srp.
this diff adds the srp api and adds the necessary metadata to struct
cpuinfo on our MP architectures. srp on uniprocessor platforms has
alternate code that is optimised because it knows there'll be no
concurrent access to data by multiple cpus.
srp is made available to the system via param.h, so it should be
available everywhere in the kernel.
the docs likely need improvement cos im too close to the implementation.
ok mpi@
|
|
boundary, not to an u area boundary. Oops.
|
|
bits the first time it is called, so don't do it again.
ok miod
|
|
ok miod@
|
|
delete coredump_trad(), uvm_coredump(), cpu_coredump(), struct md_coredump,
and various #includes that are superfluous.
This leaves compat_linux processes without a coredump callback. If that
ability is desired, someone should update it to use coredump_elf32() and
verify the results...
ok kettenis@
|
|
ok miod@
|
|
|
|
had a proper stdint.h. No ports fallout. OK guenther@ miod@
|
|
processors.
|
|
Use this on vax to correctly pick the end of the stack area now that the
stackgap adjustment code will no longer guarantee it is a fixed location.
|
|
with and ok miod@
|
|
|
|
each arch used to have to provide an rw_cas operation, but now we
have the rwlock code build its own version. on smp machines it uses
atomic_cas_ulong. on uniproc machines it avoids interlocked
instructions by using straight loads and stores. this is safe because
rwlocks are only used from process context and processes are currently
not preemptible in our kernel. so alpha/ppc/etc might get a benefit.
ok miod@ kettenis@ deraadt@
|
|
this makes mips64 consistent with the api and all other archs.
testing and ok miod@
|
