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2011-10-27Specify the TLS variant for each platform.Philip Guenthe
2011-09-22nowadays uvm_init() calls pmap_init(), not vm_init(); so update the comments.Jasper Lievisse Adriaanse
ok ariane@
2011-09-08Provide namespace-safe alignment macros in <machine/_types.h>, withPhilip Guenthe
compat names kept in <machine/param.h>. In <sys/socket.h>, pull in <sys/_types.h> instead of the namespace polluting <machine/param.h> and completely eliminate __CMSG_ALIGN, replaced by _ALIGN ok deraadt@
2011-09-08Make the INT_FAST*_{MIN,MAX} macros match the types they're defined to.Philip Guenthe
Since the underlying types of the int_fast types are set by machine/_types.h, put internal macros in that same file and define the exposed INT_FAST*_{MIN,MAX} macros from those. ok millert@, kettenis@
2011-08-29Only provide FLT_EVAL_METHOD for C99. Add missing DECIMAL_DIG for C99.Mark Kettenis
ok guenther@
2011-07-21Support for the eBenton EBT-700 netbook, which is similar to the LemoteMiod Vallat
Yeeloong, but with a 7" display with a 800x480 resolution, and no webcam. There are still problems to get it booting from disk from PMON (colour me unsurprised), which are being looked at. Loading the boot blocks from a FAT USB stick, to then boot the kernel from the disk, is a reliable workaround in the meantime. Tested by Ban Keong Yee (bankeong dot yee on gmail) who is the ``lucky'' owner of such a machine, thanks for your time!
2011-07-11Revert art@'s moving around of the KERNEL_LOCK()/KERNEL_UNLOCK() calls,Philip Guenthe
as it causes hangs in some ports, including libsigsegv's configure script confirmed by krw@, landry@
2011-07-10Do not register the per-cpu counter as a system timecounter on MULTIPROCESSORMiod Vallat
kernels, as there is no way to sync the counters between all processors.
2011-07-07There is a bunch of places in the kernel entry points where we don'tArtur Grabowski
hold the kernel lock, but still need call one function that needs it. Instead of grabbing the lock all over the place, move the locks into the affected functions: trapsignal, scdebug*, ktrsyscall, ktrsysret, systrace_redirect and ADDUPROF. In the cases we already hold the biglock we'll just recurse. kettenis@, beck@ ok
2011-07-06Clean up after P_BIGLOCK removal.Artur Grabowski
KERNEL_PROC_LOCK -> KERNEL_LOCK KERNEL_PROC_UNLOCK -> KERNEL_UNLOCK oga@ ok
2011-07-05Recommit the reverted sigacts change now that the NFS use-after-freePhilip Guenthe
problem has been tracked down. This fixes the sharing of the signal handling state: shared bits go in sigacts, per-rthread bits goes in struct proc. ok deraadt@
2011-06-24machdep.kbdreset enables a shutdown by Ctrl-Alt-Del on amd64 andChristian Weisgerber
i386. Stop abusing it on other archs for controling a shutdown by pressing the soft power button: * Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it allows a power button shutdown. * Make acpi(4)/acpibtn(4) honor hw.allowpowerdown. * Switch the various power button intercepts on landisk, sgi, sparc64 and zaurus over to hw.allowpowerdown. * Garbage collect the machdep.kbdreset sysctl on all archs other than amd64 and i386. ok miod@
2011-06-05Prefer __LP64__ to _LP64; pointed out by bradMiod Vallat
2011-05-30Remove the freelist member from vm_physsegOwain Ainsworth
The new world order of pmemrange makes this data completely redundant (being dealt with by the pmemrange constraints instead). Remove all code that messes with the freelist. While touching every caller of uvm_page_physload() anyway, add the flags argument to all callers (all but one is 0 and that one already used PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue without it. Should shrink the code a bit, as well. matthew@ pointed out some mistakes i'd made. ``freelist death, I like. Ok.' ariane@ `I agree with the general direction, go ahead and i'll fix any fallout shortly'' miod@ (68k 88k and vax i could not check would build)
2011-05-25Also enclose variable names with external linkage in __BEGIN_DECLS.Martynas Venckus
Doesn't matter much since C++ ABI used by GCC doesn't mangle variable names; however technically is required by Section 7.5 of the C++ spec. Discussed with/OK guenther@, matthew@.
2011-05-10revert a mistake commitTakuya ASADA
2011-05-10octeon's internal counter clock speed is same as the processor clock. ok miod@Takuya ASADA
2011-05-01Be sure to cast physmem to a 64-bit type before passing it to ptoa().Miod Vallat
2011-04-28Expose pmap_prefer parameters.Ariane van der Steldt
This will enable future uvm_map code to make intelligent decisions during allocation.
2011-04-28fenv improvements and cleanupsMartynas Venckus
2011-04-26fenv for mips64Martynas Venckus
2011-04-18Revert the sigacts diff: NFS can apparently retain pointers to processesPhilip Guenthe
until they're zombies and then send them signals (for intr mounts). Until that is untangled, the sigacts change is unsafe. sthen@ was the victim for this one
2011-04-15Correct the sharing of the signal handling state: stuff that shouldPhilip Guenthe
be shared (p_sigignore, p_sigcatch, P_NOCLDSTOP, P_NOCLDWAIT) moves to struct sigacts, wihle stuff that should be per rthread (ps_oldmask, SAS_OLDMASK, ps_sigstk) moves to struct proc. Treat the coredumping state bits (ps_sig, ps_code, ps_type, ps_sigval) as per-rthread until our locking around coredumping is better. Oh, and remove the old SunOS-compat ps_usertramp member. "I like the sound of this" tedu@
2011-04-10A last few NULL -> 0 corrections.Miod Vallat
2011-04-09repair a 32-bit truncation in paddr_t calculation, allowing my 8GBTheo de Raadt
o350 to boot once again ok miod
2011-04-07%x->%p in various format strings, to avoid truncating values.Miod Vallat
2011-04-07Make sure the ALIGN() macro uses u_long on all platforms for consistency, andMiod Vallat
update the comment block accordingly.
2011-04-07Do not use NULL in integer comparisons. No functional change.Miod Vallat
ok matthew@ tedu@, also eyeballed by at least krw@ oga@ kettenis@ jsg@
2011-04-04Correctly disassemble triadic version of {d,}m[ft]c instructions found onMiod Vallat
more and more mips64 processors.
2011-04-03Move PPWAIT flag from struct proc to process, so that rthreads inPhilip Guenthe
a vforked child behave correctly. Have the parent in a vfork() wait on a (different) flag in *its* process instead of the child to prevent a possible use-after-free. When ktracing the child return from a fork, call it rfork if an rthread was created. ok blambert@
2011-03-31Recognize Loongson 3A processors, but don't accept to run on them yet, theMiod Vallat
cache routines are not ready. This is mostly low-hanging fruit.
2011-03-23Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.Paul Irofti
Discussed and okay drahn@. Okay deraadt@.
2011-03-11Use _MACHINE_ENDIAN_H_ for this is The Right Thing To Do.Paul Irofti
Okay guenther@, millert@.
2010-12-28Previous diff had a buglet, found the hard way by pea@Miod Vallat
2010-12-26Kill pmap_phys_address(), and force every driver's mmap() routine to returnMiod Vallat
a physical address [more precisely, something suitable to pass to pmap_enter()'sphysical address argument]. This allows MI drivers to implement mmap() routines without having to know about the pmap_phys_address() implementation and #ifdef obfuscation.
2010-12-21Convert netisr to a normal soft interrupt instead of hanving MD codeClaudio Jeker
for it. This makes the netisr a real C function which will help further development. No noticable performance change on i386 and amd64. With input from kettenis@ and miod@ additional OKs mikeb@ and henning@
2010-12-15oops, i forgot to check in the BRKSIZ define in uvm, but deraadt thinksTed Unangst
its better as a per arch MD define anyway. all default to MAXDSIZ as before.
2010-12-13Remove superfluous SAVE_CPU_SREG()/RESTORE_CPU_SREG() around ast() call inMark Kettenis
u_general exception handler. The SAVE_CPU_SREG() is actually harmful, since it overwrites any changes made to to s0-s8 in the trapframe by ptrace(2). Fixes some issues with GDB. ok miod@
2010-12-06Change the signature of PMAP_PREFER from void PMAP_PREFER(..., vaddr_t *) toMiod Vallat
vaddr_t PMAP_PREFER(..., vaddr_t). This allows better compiler optimization when the function is inlined, and avoids accessing memory on architectures when we can pass function arguments in registers.
2010-11-28Update comment to no longer mention a page is 4KB, since this may not be theMiod Vallat
case.
2010-11-28Enable __HAVE_PMAP_DIRECT on mips64, unless the kernel is configured toMiod Vallat
run on R5000 family processors (e.g. sgi GENERIC-IP32), where direct XKPHYS mappings hit a silicon bug.
2010-11-28Allow mips64-based ports to override the default mips64 VM_PHYSSEG_STRATMiod Vallat
strategy value (BSEARCH); use BIGFIRST on loongson since there are only up to two memory segments.
2010-11-27Remove ddb single-step load and store counters. Most platforms do notMiod Vallat
implement them, and they are of questionable usefulness.
2010-11-24Floating-point emulation code for systems lacking proper FPU (i.e. Octeon),Miod Vallat
enabled by option FPUEMUL. This is pretty straightforward, except for conditional branch on FPU condition codes emulation (bc1f/bc1fl/bc1t/bc1tl instructions): unlike most RISC-with-delay-slots designs (m88k, sparc), the branch pipeline is not exposed to the kernel on Mips, therefore we can not resume a branch without losing the delay slot instruction. Some other operating systems work around this issue by emulating the delay slot instruction, but this is error-prone (and requires the kernel code to be aware of all supported instructions of the processor it is currently running on), some use dedicated breakpoints to single-step through the delay slot and then resume the branch as expected, but this causes a lot of copy-on-write allocations. This code chooses a third path, of copying the delay slot instructions to run toa special `magic' page, followed by a special trap instruction to give control back to the kernel. This makes sure the instruction will actually be run by the processor, and that no more than one page per process is wasted, regardless of the number of branches to emulate. Tested on octeon (big-endian) by syuu@ and on loongson (little-endian) by me. Note that enabling option FPUEMUL in the kernel will completely disable the hardware FPU, if there is one; there is currently no way to build a kernel supporting both hardware and software FPU, and there is no reason to change this until there is a strong need to support both.
2010-11-24Make sure ptrace_sstep(,0) actually clears breakpoints, by replacing theMiod Vallat
ptrace guts with a logic similar to what the alpha port does.
2010-11-24Implement a real pmap_proc_iflush() instead of relying on trap.c to performMiod Vallat
copious cache flushes behind our back.
2010-11-11Correctly disassemble ssnop.Miod Vallat
2010-10-27Fix a few logic errors in comparison instruction emulation: make sure theMiod Vallat
less than relation is correctly computed, and check for both operands being signaling NaNs, instead of only the first NaN found, to decide whether to raise an invalid exception or not.
2010-10-24Move build_trampoline() and setregs() to a common location for all mips ports.Miod Vallat
2010-10-24Don't short-circuit userret() when returning from trap() in the rm7000Miod Vallat
performance counter code path (which is not enabled at the moment).
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