src - OpenBSD base system

Age	Commit message (Collapse)	Author
2008-04-07	Add a freelist member to the ARCBios memory information. For now, all ARCBios	Miod Vallat
	available memory regions will be reported to be in VM_FREELIST_DEFAULT. Add a few quirks to cope with (some) IP27 and IP30 weirdness.
2008-04-07	Add ``guarded'' word read and write routines, to be used by machine-dependent	Miod Vallat
	code soon. Similar to what ddb does, but does not need ddb to be compiled in.
2008-04-07	Split clock attachment in two parts: a timecounter attachment (at mainbus),	Miod Vallat
	and a time-of-day chip (wherever it gets found).
2008-04-07	Use CCA_CACHED as the default CCA for all cached mappings and addresses.	Miod Vallat

2008-04-07	Define the pte cacheability bits from the cpu.h cache coherency constants.	Miod Vallat

2008-04-07	Define more cache coherency attributes, as well as R10k space identifiers.	Miod Vallat
	Define a symbolic ``cached'' attribute, to be used for cached mappings regardless of the system's cache coherency.
2008-03-31	Oops, a chunk was commited too early.	Miod Vallat

2008-03-30	Allow the machine-specific headers to overwrite the number of memory	Miod Vallat
	segments and the number of freelists.
2008-03-30	Remove APERTURE remains.	Miod Vallat

2008-03-20	An overoptimization in r1.15 introduced an evil race, back it out. For some	Miod Vallat
	reason this would have been blatant on sparc on motorola, one more proof mips is the ante${DEITY} yet fun to live with.
2008-02-29	Fix db_read_bytes() for short reads.	Miod Vallat

2008-02-20	Oops, correctly recover from kcopy() faults, since the stack frame is	Miod Vallat
	different now.
2008-02-20	More dead includes and functions noone will mourn.	Miod Vallat

2008-02-20	Completely overhault attachment rules on sgi. No more indirect configuration	Miod Vallat
	inherited from OpenBSD/arc machines with ISA bus; mainbus children match on device name and other hierarchies match on simplified locators. As a bonus, attachment lines in dmesg will now print their locators. ok jsing@
2008-02-20	Preserve pcb_onfault within kcopy(), as expected and as all other platforms do.	Miod Vallat

2008-02-18	Get correct memory information from 64 bit ARCBios, tested on Octane.	Miod Vallat

2008-02-18	Use better types and fix tests for pc and sp being in kernel to really	Miod Vallat
	handle XKPHYS addresses correctly.
2008-02-18	More 64-bit ARCBios friendliness, correctly identify a 64 bit system, such	Miod Vallat
	as the Octane; joint work with jsing@
2008-02-16	Remove the wait instruction from cpu_idle_cycle(), as it causes problems on	Miod Vallat
	RM7000 machines.
2008-02-11	A couple fixes:	Miod Vallat
	- evict the memory from cache in pmap_page_free(). - make sure to sync cache in pmap_protect() if it marks a modified cacheable page as read-only.
2008-01-15	Revert r1.15 and flush pages (if cached) in pmap_remove_pv on every invocation,	Miod Vallat
	instead of when removing the last page. It looked correct, but is defeated by ``index'' cache invalidates.
2007-12-18	add power(4), a driver for the power button found on SGI O2's.	Jasper Lievisse Adriaanse
	when machdep.kbdreset is set, and the correct interrupt is fired, the machine gets shut down. with help from and ok jsing@, ok miod@
2007-12-18	Expose the clock address space so that it can be used outside of clock(4).	Joel Sing
	ok miod@
2007-12-14	Store the ARCBIOS ConsoleOut environment variable so that we can refer to	Joel Sing
	it later on. ok miod@
2007-11-25	spelling fixes, from Martynas Venckus;	Jason McIntyre

2007-11-24	Recognize the wait r5k instruction in ddb and use it in cpu_idle_cycle.	Miod Vallat
	ok jsing@ a while ago (and this diff is much much older)
2007-10-25	Be sure to enable interrupts on return from ddb if they were enabled before	Miod Vallat
	the break.
2007-10-24	pipleine -> pipeline	Miod Vallat

2007-10-24	In cpu_switchto(), load pmap->pm_tlbpid manually, instead of expecting	Miod Vallat
	pmap_update() to return with this value in v0. A void function. Bwahahaha.
2007-10-22	stoped -> stopped	Joel Sing
	ok miod@
2007-10-18	Make sure interrupts are really enabled at the beginning of proc_trampoline,	Miod Vallat
	tested by deraadt@ jsing@
2007-10-18	No need to include <machine/pte.h> here.	Miod Vallat

2007-10-18	Get rid of the silly union for mips pte. No functional change except	Miod Vallat
	pmap.h now includes pte.h.
2007-10-14	registred -> registered	Miod Vallat

2007-10-13	There is no need to fiddle with spl in cpu_idle_{enter,leave}, actually.	Miod Vallat

2007-10-13	Do not splhigh() before invoking sched_exit(), sched_exit() will do it better.	Miod Vallat

2007-10-10	Make context switching much more MI:	Artur Grabowski
	- Move the functionality of choosing a process from cpu_switch into a much simpler function: cpu_switchto. Instead of having the locore code walk the run queues, let the MI code choose the process we want to run and only implement the context switching itself in MD code. - Let MD context switching run without worrying about spls or locks. - Instead of having the idle loop implemented with special contexts in MD code, implement one idle proc for each cpu. make the idle loop MI with MD hooks. - Change the proc lists from the old style vax queues to TAILQs. - Change the sleep queue from vax queues to TAILQs. This makes wakeup() go from O(n^2) to O(n) there will be some MD fallout, but it will be fixed shortly. There's also a few cleanups to be done after this. deraadt@, kettenis@ ok
2007-09-22	M_ZERO -> bzero.	Kenneth R Westerback
	ok art@
2007-09-10	Introduce a md pmap hook, pmap_remove_holes(), which is supposed to mark	Miod Vallat
	the holes a MMU may have from a given vm_map. This will be automagically invoked for newly created vmspaces. On platforms with MMU holes (e.g. sun4, sun4c and vax), this prevents mmap(2) hints which would end up being in the hole to be accepted as valid, causing unexpected signals when the process tries to access the hole (since pmap can not fill the hole anyway). Unfortunately, the logic mmap() uses to pick a valid address for anonymous mappings needs work, as it will only try to find an address higher than the hint, which causes all mmap() with a hint in the hole to fail on vax. This will be improved later.
2007-09-03	call savectx() in cpu_fork(), so that the new process can take signals	Miod Vallat
	correctly in child_return()'s userret(); makes the sys/kern/signal/earlysig regression test pass. From a 2.5 years old diff I should have commited much earlier.
2007-09-03	Typos from miod. 'requiered' -> 'required' in some comments.	Kenneth R Westerback

2007-07-18	Prefer ``hit'' cache operations when flushing kernel memory.	Miod Vallat

2007-07-18	bus_dmamem_map() maps with a single segment in directly-translated XKPHYS	Miod Vallat
	space, either cache coherent for regular mappings and uncached for BUS_DMA_COHERENT mappings, as done on all other platforms with direct mappings.
2007-07-16	Replace bunches of nops with the ITLBNOPFIX macro, which generates fewer	Miod Vallat
	nops unless we compile for early RM7000 flavours, which we usually don't do.
2007-07-16	On exit from switch_exit(), do not bother saving context and immediately	Miod Vallat
	jump into the scheduler loop.
2007-07-16	Do not reenabled interrupts when processing a ddb trap, for bad things may	Miod Vallat
	happen; from NetBSD
2007-07-16	Change idle_mask to be made of the cop0 SR bits unshifted and the cop0 IC bits	Miod Vallat
	shifted, instead of the other way around; this shaves a few instructions.
2007-07-05	Compute the correct address and try and print a matching symbol for j and	Miod Vallat
	jal instructions.
2007-07-01	In cpu_switch(), store the saved cpl in the pcb as a 64 bit store, so that	Miod Vallat
	the high order bits are not undefined when invoking hw_setintrmask() on return.
2007-06-21	Extent sgi bus_dma to cope with different views of memory: non-contiguous	Miod Vallat
	for the cpu, contiguous from different bases for devices. This allows memory above 256MB to be used with bus_dma (and we had really been lucky with the first few large-memory builds). Information about memory accesses taken from Linux.