| Age | Commit message (Expand) | Author |
|---|
| 2013-01-16 | On second thought, do not unconditionnaly register the cpu throttling code | Miod Vallat |
| 2013-01-16 | Do not register the internal cpu timer-based timecounter if we support cpu | Miod Vallat |
| 2013-01-16 | cpu_coredump() also needs to invoke vn_rdwr() without IO_NODELOCKED; only | Miod Vallat |
| 2013-01-15 | Loongson: Add a stat clock for the lemote machines. | Paul Irofti |
| 2013-01-14 | Loongson: Replace the system clock provided by the CPU with a GLX MFGPT. | Paul Irofti |
| 2012-12-05 | Remove excessive sys/cdefs.h inclusion | Theo de Raadt |
| 2012-12-04 | Only pull in sys/cdefs.h if needed | Theo de Raadt |
| 2012-12-02 | Determine whether we're currently on the alternative signal stack | Philip Guenthe |
| 2012-11-05 | unifdef -D __HAVE_TIMECOUNTER | Miod Vallat |
| 2012-10-03 | Don't include <mips64/archtype.h> unless you really need it. | Miod Vallat |
| 2012-10-03 | Do not use <mips64/archtype.h> for loongson model numbers, but rather put the | Miod Vallat |
| 2012-10-03 | Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs, | Miod Vallat |
| 2012-09-29 | Do not hardcode ARCBios vector base, but rather compute it at runtime. | Miod Vallat |
| 2012-09-29 | Basic R8000 processor support. R8000 processors require MMU-specific code, | Miod Vallat |
| 2012-09-29 | Forgot this in previous commit | Miod Vallat |
| 2012-09-29 | Store the base value of coprocessor 0 system register, when running userland, | Miod Vallat |
| 2012-09-29 | Sort cpu and fpu list, and don't bother printing those we don't run on (yet). | Miod Vallat |
| 2012-09-29 | Handle the coprocessor 0 cause and status registers as a 64 bit value now, | Miod Vallat |
| 2012-09-29 | Avoid an unnecessary copyin() call in the SYS__syscall handling path. | Miod Vallat |
| 2012-09-29 | Add a few more coprocessor 0 cause and config registers defines. | Miod Vallat |
| 2012-09-29 | Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlb | Miod Vallat |
| 2012-09-29 | Introduce assembly macros for specific processor hazards: tlb update, status | Miod Vallat |
| 2012-09-29 | Move proc_trampoline, which is not really exception processing, from exception.S | Miod Vallat |
| 2012-09-29 | Provide a few more macros in <machine/asm.h> to wrap coprocessor 0 | Miod Vallat |
| 2012-09-29 | Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions of | Miod Vallat |
| 2012-09-11 | Remove the 'OLF method' used for the transition from a.out to ELF and | Theo de Raadt |
| 2012-08-22 | sigpid should be of type pid_t (only visable with DEBUG). | Okan Demirmen |
| 2012-08-07 | Handle __syscall as syscall, since these are identical on 64-bit platforms, | Miod Vallat |
| 2012-08-07 | Move the common bits of syscall invocation and return handling into | Philip Guenthe |
| 2012-07-14 | Split the existing mips64 clock code into time-of-day and generic duties in | Miod Vallat |
| 2012-07-09 | Do not re-initialize ci_randseed on the primary cpu | Theo de Raadt |
| 2012-06-26 | create new machine/_float.h which is namespace clean. create a new | Theo de Raadt |
| 2012-06-24 | Bring in line with current cache_r{5,10}k.c style, and optimize slightly the | Miod Vallat |
| 2012-06-24 | Since the RM7000 cache behaves as a physically-indexed cache due to the set | Miod Vallat |
| 2012-06-24 | Get the L2 line size from the configuration register instead of hardcoding the | Miod Vallat |
| 2012-06-24 | Do not output unnecessary semicolons when expanding macros. No functional change | Miod Vallat |
| 2012-06-24 | Add cache operation functions pointers to struct cpu_info; the various | Miod Vallat |
| 2012-06-23 | Replace R5000 and R10000 family assembly cache routines with C equivalents, | Miod Vallat |
| 2012-06-23 | Fix ITLBNOPFIX macro definition on RM7000-capable kernels, and use it | Miod Vallat |
| 2012-06-17 | No longer restrict alloc_contiguous_pages() to memory in the low 4GB. | Miod Vallat |
| 2012-06-17 | Using the LLAddr register to store our curcpu() pointer on R10k SMP kernels | Miod Vallat |
| 2012-05-27 | Add a `L2 cache line size' member to struct cpu_info. This allows R4k code to | Miod Vallat |
| 2012-05-27 | Replace Loongson2F assembly cache routines with equivalent C code. This will | Miod Vallat |
| 2012-05-17 | Correct virtual aliasing mask computation. | Miod Vallat |
| 2012-05-10 | The uvm_map() changes introduced about two months ago yield a different | Miod Vallat |
| 2012-04-25 | Skip cache flushes in pmap_zero_page() and pmap_copy_page() on systems | Miod Vallat |
| 2012-04-24 | Harvest some low-hanging fruit in thu R5k/RM7k cache routines: | Miod Vallat |
| 2012-04-24 | Add support for wired mappings, using the last unused bit in the PTE. | Miod Vallat |
| 2012-04-24 | Introduce a #define for the number of PFN bits in a pte, to be used in the | Miod Vallat |
| 2012-04-21 | Correct a wrong comment. | Miod Vallat |
