| Age | Commit message (Expand) | Author |
|---|
| 2012-08-22 | sigpid should be of type pid_t (only visable with DEBUG). | Okan Demirmen |
| 2012-08-07 | Handle __syscall as syscall, since these are identical on 64-bit platforms, | Miod Vallat |
| 2012-08-07 | Move the common bits of syscall invocation and return handling into | Philip Guenthe |
| 2012-07-14 | Split the existing mips64 clock code into time-of-day and generic duties in | Miod Vallat |
| 2012-07-09 | Do not re-initialize ci_randseed on the primary cpu | Theo de Raadt |
| 2012-06-26 | create new machine/_float.h which is namespace clean. create a new | Theo de Raadt |
| 2012-06-24 | Bring in line with current cache_r{5,10}k.c style, and optimize slightly the | Miod Vallat |
| 2012-06-24 | Since the RM7000 cache behaves as a physically-indexed cache due to the set | Miod Vallat |
| 2012-06-24 | Get the L2 line size from the configuration register instead of hardcoding the | Miod Vallat |
| 2012-06-24 | Do not output unnecessary semicolons when expanding macros. No functional change | Miod Vallat |
| 2012-06-24 | Add cache operation functions pointers to struct cpu_info; the various | Miod Vallat |
| 2012-06-23 | Replace R5000 and R10000 family assembly cache routines with C equivalents, | Miod Vallat |
| 2012-06-23 | Fix ITLBNOPFIX macro definition on RM7000-capable kernels, and use it | Miod Vallat |
| 2012-06-17 | No longer restrict alloc_contiguous_pages() to memory in the low 4GB. | Miod Vallat |
| 2012-06-17 | Using the LLAddr register to store our curcpu() pointer on R10k SMP kernels | Miod Vallat |
| 2012-05-27 | Add a `L2 cache line size' member to struct cpu_info. This allows R4k code to | Miod Vallat |
| 2012-05-27 | Replace Loongson2F assembly cache routines with equivalent C code. This will | Miod Vallat |
| 2012-05-17 | Correct virtual aliasing mask computation. | Miod Vallat |
| 2012-05-10 | The uvm_map() changes introduced about two months ago yield a different | Miod Vallat |
| 2012-04-25 | Skip cache flushes in pmap_zero_page() and pmap_copy_page() on systems | Miod Vallat |
| 2012-04-24 | Harvest some low-hanging fruit in thu R5k/RM7k cache routines: | Miod Vallat |
| 2012-04-24 | Add support for wired mappings, using the last unused bit in the PTE. | Miod Vallat |
| 2012-04-24 | Introduce a #define for the number of PFN bits in a pte, to be used in the | Miod Vallat |
| 2012-04-21 | Correct a wrong comment. | Miod Vallat |
| 2012-04-21 | Rework the signature of the cache handling routines again. It makes more sense | Miod Vallat |
| 2012-04-19 | Print the currently active ASID in `machine tlb' ddb command. | Miod Vallat |
| 2012-04-19 | Be sure to update the currently active ASID in pmap_activate() if invoked on | Miod Vallat |
| 2012-04-16 | Move proc0 and trap handler setup before consinit(), but still wait for the | Miod Vallat |
| 2012-04-16 | Fix struct arc_param_blk_* layout to not embed pointers, as this messes the | Miod Vallat |
| 2012-04-15 | Tell Indy and Challenge S apart. | Miod Vallat |
| 2012-04-11 | The first ktrace record for a newly spawned thread is a return | Mike Belopuhov |
| 2012-04-10 | Count traps and fpu context switches. | Miod Vallat |
| 2012-04-09 | No need to round VCEI addresses, and VCED addresses only need to be rounded | Miod Vallat |
| 2012-04-09 | More errata bandaid for the R4000SC is necessary in the tlb handlers. | Miod Vallat |
| 2012-04-06 | Make the logic for PMAP_PREFER() and the logic, inside pmap, to do the | Miod Vallat |
| 2012-04-06 | Rework IP22 RTC year base computation, again. It turns out that different | Miod Vallat |
| 2012-03-28 | Work in progress support for the SGI Indigo, Indigo 2 and Indy systems | Miod Vallat |
| 2012-03-25 | Move cache handling routines related definitions to a dedicated header file, | Miod Vallat |
| 2012-03-25 | Only set the low order bits of CpuCacheAliasMask if it is nonzero, regression | Miod Vallat |
| 2012-03-24 | Fix fallback of uvm_map_hint() argument changes. | Miod Vallat |
| 2012-03-24 | Oops, forgot this file in the SGI_<model> -> SGI_IP## change. | Miod Vallat |
| 2012-03-24 | The various ConfigCache() functions actually return void, not int. | Miod Vallat |
| 2012-03-24 | Rename the various SGI_xxx constants from machine names to their IP numbers, | Miod Vallat |
| 2012-03-24 | Add a few trivial routines to get mips64r2 specific config registers. Not used | Miod Vallat |
| 2012-03-19 | On sgi, use CKSEG0 addresses whenever possible for pmap_map_direct and u area | Miod Vallat |
| 2012-03-19 | Recent uvm code (and maybe not-so-recent, but it did not explode^WKASSERT at | Miod Vallat |
| 2012-03-19 | Use uncached addresses for all exception vectors, when copying our code (or | Miod Vallat |
| 2012-03-15 | uncached_base was introduced early in IP27 support, since these designs use | Miod Vallat |
| 2012-02-16 | Do an explicit `sync' instruction before returning from cache routines; this is | Miod Vallat |
| 2012-02-16 | Be sure to reset coprocessor 0 TAG_LO register to zero before attempting | Miod Vallat |
