| Age | Commit message (Expand) | Author |
|---|
| 2007-12-15 | Get the MVME197 memory size from the BusSwitch decoders. | Miod Vallat |
| 2007-12-15 | Unconditionnaly disable the instruction cache on 40MHz MVME197LE boards, | Miod Vallat |
| 2007-12-15 | All MVME BUG manuals concur on SR3 being the only register needing to be | Miod Vallat |
| 2007-12-15 | Since the 88110 can not invalidate a particular tlb entry, do not stack | Miod Vallat |
| 2007-12-15 | Move the cmmu lock back from 8820x-specific code to global, and use it on | Miod Vallat |
| 2007-12-13 | Disable write posting, this does not work on BusSwitch revision #1. The BUG | Miod Vallat |
| 2007-12-09 | I honestly do not remember what 88110 errata convinced me to disable | Miod Vallat |
| 2007-12-09 | Nuke evil common, spotted by martin@ | Miod Vallat |
| 2007-12-08 | Better siginfo fault codes for floating point exceptions on 88110, with | Miod Vallat |
| 2007-12-05 | Make the CPU_88100 and CPU_88110 constants match the architectural number | Miod Vallat |
| 2007-12-05 | Correctly setup the seconday processor on 197DP, and get it ready to accept | Miod Vallat |
| 2007-12-04 | Work in progress SMP code for 88110 processor using the BusSwitch chip as | Miod Vallat |
| 2007-12-04 | Correctly set the stack pointer of a secondary processor to the end | Miod Vallat |
| 2007-12-04 | Better cache routines for 88410, will only flush in pages instead of | Miod Vallat |
| 2007-12-04 | Program the abort interrupt source correctly. | Miod Vallat |
| 2007-12-02 | Rework mmu initialization so that we do not actually enable translation | Miod Vallat |
| 2007-12-02 | Add a workaround for the MVME197LE reset issue when not system controller. | Miod Vallat |
| 2007-12-02 | Remove 88110 control registers accessors which are never used anywhere. | Miod Vallat |
| 2007-12-02 | The beginning of a real floating-point exception handler for the 88110. The | Miod Vallat |
| 2007-12-02 | Do not pass UPAGES and USPACE (under the name USIZE) in assym.h, code which | Miod Vallat |
| 2007-12-02 | Better inline assembler constructs. | Miod Vallat |
| 2007-12-02 | Rework the __mp_lock code to not spin at spllock(), kinda similar to the | Miod Vallat |
| 2007-11-30 | Define NORMAL_C_NOP everywhere. | Miod Vallat |
| 2007-11-27 | typos; ok jmc@ | Martynas Venckus |
| 2007-11-26 | Move the implementation of __mp_lock (biglock) into machine dependent | Artur Grabowski |
| 2007-11-26 | few more dribbles of LIBKERN cleanup | Theo de Raadt |
| 2007-11-26 | More LIBKERN bits that go away | Theo de Raadt |
| 2007-11-25 | libkern, begone. Move to a new mechanism where config(8)'s "file" | Theo de Raadt |
| 2007-11-25 | Get rid of the kernel 'libcompat' framework, and instead use conf/files to | Theo de Raadt |
| 2007-11-24 | Fix a stupid underscore bug in memory area computations in the cache functions, | Miod Vallat |
| 2007-11-24 | Be sure to program the busswitch interrupt selection register on 197SP | Miod Vallat |
| 2007-11-22 | Split the cmmu code routines into single 88110 (MVME197LE) and 88110+88410 | Miod Vallat |
| 2007-11-22 | Introduce an inline function to skip an instruction on 88110 and use it | Miod Vallat |
| 2007-11-22 | Quote a few errata to explain why odd things are done in oddly ways on 88110. | Miod Vallat |
| 2007-11-22 | Remove the cpu parameter from cmmu_set_sapr(), since it is only invoked | Miod Vallat |
| 2007-11-22 | Move the cmmu lock to 88200-specific code. 88110 MP code will use ipis | Miod Vallat |
| 2007-11-21 | Better cache invalidation functions (still horribly unoptimal, but less | Miod Vallat |
| 2007-11-17 | The initial ipl on luna/mvme188 like interrupt arbiters is IPL_HIGH, not | Miod Vallat |
| 2007-11-17 | Replace many ``unsigned'' variables with ``unsigned int'', ``u_int'' or other | Miod Vallat |
| 2007-11-17 | Add some preprocessor magic to let M187 and M188 kernels compile again. | Miod Vallat |
| 2007-11-17 | Rework {get,set,raise}ipl() to minimize psr modification, especially on | Miod Vallat |
| 2007-11-15 | Stop referring the initial kernel stack as the ``interrupt stack''. It's | Miod Vallat |
| 2007-11-14 | Cache curcpu() value into a local variable when it is used more than once in | Miod Vallat |
| 2007-11-14 | No need to check whether we are the primary processor in m188_{clock,stat}intr, | Miod Vallat |
| 2007-11-14 | Merge the ci_alive and ci_primary boolean values of struct cpu_info into | Miod Vallat |
| 2007-11-14 | Let ``machine cpu #'' hop to the given cpu. | Miod Vallat |
| 2007-11-12 | Restart clock before invoking hardclock() and statclock(), otherwise they | Miod Vallat |
| 2007-11-12 | Split handling of unmaskable vs maskable ipi to make the core simpler, | Miod Vallat |
| 2007-11-11 | Rework ipi handling to delay acking the maskable ipi interrupt, so that it | Miod Vallat |
| 2007-11-11 | Use two software interrupt sources per processor for IPIs, instead of only | Miod Vallat |
