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type of all variables to daddr64_t. this includes the APIs for XXsize()
and XXdump(), all range checks inside bio drivers, internal variables
for disklabel handling, and even uvm's swap offsets. re-read numerous
times by otto, miod, krw, thib to look for errors
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accuracy so that the variious disksubr.c's can be compared easier.
setdisklabel() starts taking an int for openmask.
ok krw, and read by quite a few other people
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for overwriting the disklabel. Reorder some checks so all copies of
bounds_check_with_label do the checks in the same order. Order picked
by using the currently most popular one. Should be no functional
change.
"If it's boring, commit it" deraadt@
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to size. tested on almost all machines, double checked by miod and krw
next comes the type handling surrounding these values
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convert version 0 to version 1 disklabels.
Suggested by deraadt@.
ok deraadt@ otto@
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subsystems were enabled. others used a *md_diskconf -> diskconf() method to
make sure init_main could "do late setroot". Change all architectures to
have diskconf(), use it directly & late. tested by todd and myself on most
architectures, ok miod too
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1) Use local variable 'labelsector' not 'labelsect' to be consistant (hp300,
mac68k, mvme68k, mvme88k, vax).
2) Having checked for sz == 0, the next check needs only be sz < 0, not <= 0.
(mac68k, mvme68k, mvme88k)
3) Use lp->d_partitions + DISKPART(dev), rather than
lp->d_partitions[DISKPART(dev)] (hp300).
Assuming no typos there should be no functional change.
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bounds_check_with_label() routines as identical as possible without
changing any code. Code nits and adjustments to come.
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(and part of setroot); ok miod
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free room in struct partition by packing fragment size and
fragments/block more tighlty and use the resulting space to make
offset and size 48 bits. For the disk part we use spare fields in
struct disklabel. Kernel converts in-mem copy of the on-disk
label if needed, disklabel(8) writes new version.
We are careful to only change fields not used by bootloaders.
Conception of basic scheme by deraadt.
ok deraadt@ krw@
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preparation for translating all disk labels visible to the kernel to
the soon to arrive V1 format.
ok otto@ deraadt@
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ok pedro@
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prompted by/ok dlg@ deraadt@
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deraadt@ dlg@.
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grudgingly ok deraadt@
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architectures to print it the same way.
ok henning, miod; i386 part from tom
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to play.
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lowering the spl.
Also, warn and halt in tracks if the interrupt pin of a secondary cpu never
clears (found the hard way in one of the 2P256 modules here), since there is
nothing better we can do.
Last, do not attempt to handle VME interrupts on secondary processors yes
(this confuses the bus, since both processors will perform a VME interrupt
acknowledge sequence, but only one will succeed).
This lets processes correctly run on all the available processors in
single-user mode, but there are still issues to sort out.
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enabled, and is delayed if the current spl is not high enough; setipl() and
raiseipl() will retrigger an IPI interrupt if there are any pending IPIs.
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device_register() function -- even if it does nothing. reduces the
cpp-based blather different between architectures
idea ok'd by miod; tested on all architectures (except a few miod will
need to cleanup because he has them)
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send clock ticks to secondary processors.
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done on 188, for MULTIPROCESSOR kernels.
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the same)
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as done for DAEs not occuring during interrupts.
Remove the check for unprocessed DAE on return from trap() in eh_common.S,
since this can't happen. As a result, the return-from-trap code becomes
identical on 88100 and 88110 systems.
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machines. Instead -- build one solid clean MI version, and thenchange all
the architectures to use it. ok various people, tested on almost all cases.
(it is a 10094 line diff..)
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as no more than one interrupt is registered for a given level.
Then, if the VME interrupt vector reading cycle fails on the 188 interrupt
arbiter, we can use this table as a hint if it has a valid entry, since
we know on which ipl line the interrupt occured.
This basically silences the
m188_ext_int: timeout getting VME interrupt vector, level 3, mask 0x400<IRQ3>
occasional messages appearing when the MVME376 is overloaded.
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rt and such; tested and ok miod drahn
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address range we've been given, rounded to cache line boundaries, instead
of being lazy and operating on pages as soon as the range was large enough.
Also, since the ranges we'll be invoked for are reasonably small, it does
not make sense to check for segment sizes - we're always smaller, really.
While there, hardcode the size in cmmu_flush_data_cache(), which becomes
cmmu_flush_data_page(), since it was always invoked for complete pages.
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the end of the address space; allows the A16D16 VME space to be mapped
correctly again on MVME197.
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right now that are supposed to be atomic with respect to interrupts and
SMP: atomic_setbits_int and atomic_clearbits_int.
All architectures other than i386 and amd64 get dummy implementations
since at first we'll be replacing operations that are done with
"a |= bit" and "a &= ~bit" today. More proper implementations will follow
kettenis@, miod@ ok
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in its exception-related contents and pcb-related contents.
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ok miod@ marco@ deraadt@
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confusing when trying to attach scsibus to a hba, since it is really meant
for attaching scsi devices to scsibus.
ok deraadt@ marco@
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stable MULTIPROCESSOR kernels.
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handler.
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pfsr pointers seven months ago. This would work, but not in all fault cases;
now it does the right thing.
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override the DAE helper routines with workaroundless code while the kernel
text is still writable.
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independent subfunctions, turn PFSR_SAVE into a couple of NOP, and replace
them early at runtime with a branch to the selected routine, which will
return to pfsr_save.
This is really better for 188 systems.
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