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2008-10-02First step towards cleaning up the Ethernet driver ioctl handling.Brad Smith
Move calling ether_ioctl() from the top of the ioctl function, which at the moment does absolutely nothing, to the default switch case. Thus allowing drivers to define their own ioctl handlers and then falling back on ether_ioctl(). The only functional change this results in at the moment is having all Ethernet drivers returning the proper errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown ioctl's. Shrinks the i386 kernels by.. RAMDISK - 1024 bytes RAMDISKB - 1120 bytes RAMDISKC - 832 bytes Tested by martin@/jsing@/todd@/brad@ Build tested on almost all archs by todd@/brad@ ok jsing@
2008-09-23Fix uninitialized variable.Miod Vallat
2008-09-19Perform the mvme197 latency timer reprogramming in the boot blocks, inMiod Vallat
addition to the kernel, and unconditionnaly handle all busswitch revision 1 based boards as horribly broken, even with 50MHz clocks. Based on an report of an early 50MHz 197LE board being unable to boot, due to memory corruption.
2008-07-30Do not print adapter target id on the attachment line, now that scsibus(4)Miod Vallat
prints it. These should be the last offenders.
2008-07-21nam2blk[] needs a "vnd" entry for some things (like softraid)Todd T. Fries
ok marco@ no objection miod@ need this for regress djm@ no objection krw@
2008-06-27Clear swap encryption keys before dumping a kernel image.Miod Vallat
2008-06-26First pass at removing clauses 3 and 4 from NetBSD licenses.Ray Lai
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors. OK deraadt@
2008-06-12Bring biomem diff back into the tree after the nfs_bio.c fix went in.Theo de Raadt
ok thib beck art
2008-06-11back out biomem diff since it is not right yet. Doing very largeTheo de Raadt
file copies to nfsv2 causes the system to eventually peg the console. On the console ^T indicates that the load is increasing rapidly, ddb indicates many calls to getbuf, there is some very slow nfs traffic making none (or extremely slow) progress. Eventually some machines seize up entirely.
2008-06-10Fix buffer cache pending read statistics by ensuring we can identifyBob Beck
biowait() reads that do *not* come from the buffer cache - we use the B_RAW flag to identify these at art's suggestion - since it makes sense and the flag was not being used. this just flags all these buffers with B_RAW - biodone already ignores returned buffers marked B_RAW. ok art@
2008-06-08Make sure to cnpollc(1)/cnpollc(0) around cngetc() or getsn() calls.Miod Vallat
2008-06-08alpha/conf/RAMDISKTheo de Raadt
2008-05-14Fix more chrtoblktbl[] sloppyness, and add proper block st nodes to *ppc andMiod Vallat
sgi.
2008-04-12Compile kernels with -Wvariable-decl (except on arches with ipmi, for now).Miod Vallat
2008-04-09Add new stub uvm_shutdown() and call it from the right place in MD boot()Theo de Raadt
2008-04-08Split the cdev makro for bpftun into two seperate definitions. tun(4) andClaudio Jeker
bpf(4) are different enough so that the split makes sense -- this is necessary to make bpf(4) cloneable. requested deraadt@, OK thib@
2008-04-02Rewrite the startup code for the mvme88k bootblocks, once again. Some ofMiod Vallat
them (especially the netboot ones) will now self-relocate, which makes BUG configuration much simpler. WARNING: for disk-based systems, you need to update bootxx and bootsd at the same time. New bootsd will not run when loaded from an older bootxx. This doesn't matter much since you need both with installboot.
2008-03-31Switch bootloaders to mi loadfile().Miod Vallat
2008-03-31Compile libsa with -D_STANDALONE.Miod Vallat
2008-03-23setroot() is supposed to be safe in all cases, so kill the special casesTheo de Raadt
for RB_DFLTROOT; ok miod
2008-01-23Cleanup cn_pri. Change constants to more meaningful names, rather thanJoel Sing
the hp300 related ones currently in use. CN_NORMAL becomes CN_LOWPRI, CN_INTERNAL becomes CN_MIDPRI and CN_REMOTE becomes CN_HIGHPRI. ok miod@
2008-01-13Add a machdep.cputype sysctl, which returns the processor type (0 for 88100,Miod Vallat
1 for 88110), for userland to have an easy way to figure out.
2008-01-13Remove unused cpumod variable.Miod Vallat
2008-01-05For each channel, tell if it is single-ended or differential if we can knowMiod Vallat
this. Might help before someone sets his disks on fire. Especially with boards where not all channels are of the same type.
2008-01-03Enable wide transfers in the IOPB on wide busses, and get the IOPB passthroughMiod Vallat
SCSI commands length correct (it's a length in 16 bit words, not in 8 bit bytes).
2008-01-02Do not invalidate the 88410 cache without flushing it first; this isMiod Vallat
probably due either to an error in the cpu-to-88410 communication protocol, or to a bug in the '410 (but since I do not know how to get its revision, I can't tell whether this is the obscure v1 bug or not). This allows osiop-connected devices to work correctly on 197SP/DP boards.
2008-01-01Match on Cougar boards, and try to drive them like Jaguars on steroids. OnMiod Vallat
wide Cougars, use one command queue per target and disable lun support, so that we do not overflow the board's memory; and since we are behaving as a Jaguar, do not do tagged queuing or synchronous transfer negotiation. Tested on two MVME328XT-2 (4220 and second revision artwork 4220) narrow Cougar-I (but wide external connectors), but probes fail with select timeout so far; I could not get various Motorola BUG to probe devices on these boards either, so we're even (and maybe both my boards are toast, but I won't bet money on this).
2008-01-01A potpourri of bugfixes:Miod Vallat
- switch back to a fixed queue number allocation, but keep the rotating command queue entries. Force openings to 1 because of this. - make sure to mark the queue as ready before invoking scsi_done(), which could trigger a request for the same target. - allocate a command queue and an IOPB at the same time, instead of using two routines and ugly queue pointer arithmetic. This makes the daughterboard work, as long as the first scsi chain is not empty.
2007-12-31replace ctob/btoc by ptoa/atop as done for other architecturesMartin Reindl
2007-12-27Remove leftover code in m197_machdep.c, back when I wanted to address theMiod Vallat
DCAM2 boards in a different way.
2007-12-27Make the mvme188 interrupt handling closer to the aviion interrupt handling:Miod Vallat
non-VME syscon interrupt sources will now use their own intrhand array, and interrupt sources will be enabled in the arbiter as interrupt handlers are registered. This allows VME devices to use the whole 256 interrupts range.
2007-12-26Since no cache flush/inval operation will occur before we enable D$, andMiod Vallat
we never disable it, it is not necessary to check for D$ to be enabled before acting. That's a few more cycles spared.
2007-12-26Remove the last debug bit from the PSR on 88110: do not force memory accessesMiod Vallat
instructions to be serialized (this defeats the purpose of having a superscalar processor, and accesses to volatile variables are done with explicit memory barriers anyway). This brings a HUGE speedup: openssl speed -elapsed shows AES is 90% faster, blowfish is 75% faster, and sha1 is 50% faster. Not so bad! However, doing this increases the pressure on the processor bus, so it is necessary to increase the processor bus timeout on 40MHz boards again (to 256 usec). ``black cat'' 50MHz boards seem to be unaffected, so they remain at 64 usec.
2007-12-25Limit physmem to 32MB on 01-W3869B02[EF] boards which shipped with 64MB ofMiod Vallat
memory but a memory controller limited to 32MB. Not tested for lack of such crippled hardware, just the average once-per-leap-year act of niceness from me (a bit early though).
2007-12-25Tell 197SP and 197DP apart in MULTIPROCESSOR kernels.Miod Vallat
2007-12-25Increase timeout on the processor bus when running without snooping enabled.Miod Vallat
This lets 40MHz MVME197LE boards run with instruction cache enabled, and also fixes random instruction faults occuring on the early 50MHz models.
2007-12-22Move initial PSR initialization to a separate routine, instead of duplicatingMiod Vallat
it five times.
2007-12-22Enable branch prediction on MC88110 revision 5 and later, since we canMiod Vallat
workaround errata #1 differently on these models.
2007-12-21Change the EF_xxx constants to be real offsets within the trapframe, insteadMiod Vallat
of offsets / sizeof(register_t), and nuke the REG_OFF macro. No functional change.
2007-12-20Do not wait for the end of the universe if delay(0).Miod Vallat
2007-12-20Stricter range checks in mmap function.Miod Vallat
2007-12-15Get the MVME197 memory size from the BusSwitch decoders.Miod Vallat
2007-12-15Unconditionnaly disable the instruction cache on 40MHz MVME197LE boards,Miod Vallat
so that they run stably. Definitely overkill and causing a severe performance hit (they now run about as fast as a 25MHz board with I$ enabled would), but sometimes you can't fight silicon bugs. Other boards (i.e. 50MHz ones) are not affected.
2007-12-15All MVME BUG manuals concur on SR3 being the only register needing to beMiod Vallat
preserved across BUG calls, but on the other hand the last 16 traps need to be restored to BUG values, not only trap #496.
2007-12-15Since the 88110 can not invalidate a particular tlb entry, do not stackMiod Vallat
invalidate tlb ipis, and turn them into simple ``handle once'' ipis.
2007-12-15Move the cmmu lock back from 8820x-specific code to global, and use it onMiod Vallat
MVME197DP to serialize 88410 operations.
2007-12-13Disable write posting, this does not work on BusSwitch revision #1. The BUGMiod Vallat
should do this for us, but better play safe.
2007-12-09I honestly do not remember what 88110 errata convinced me to disableMiod Vallat
out-of-order (superscalar) execution on these processors. Since OoO brings a nice 50% to 250% speedup (as shown by ``openssl speed''), it is definitely worth enabling.
2007-12-09Nuke evil common, spotted by martin@Miod Vallat
2007-12-08Better siginfo fault codes for floating point exceptions on 88110, withMiod Vallat
more work in progress to handle these exceptions correctly, and document a new undocumented and evil chip bug while there.