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path: root/sys/arch/riscv64/include/cpu.h
AgeCommit message (Expand)Author
2024-06-11Enable UVM percpu cache on riscv64Jeremie Courreges-Anglas
2024-04-29remove prototypes for removed functionsJonathan Gray
2024-02-25clockintr: rename "struct clockintr_queue" to "struct clockqueue"Scott Soule Cheloha
2024-01-27On Allwinner D1, the SBI call to schedule timer interrupts doesn't work.Mark Kettenis
2024-01-24clockintr: switch from callee- to caller-allocated clockintr structsScott Soule Cheloha
2023-09-19Import the DVFS code from arm64.Mark Kettenis
2023-08-23all platforms: separate cpu_initclocks() from cpu_startclock()Scott Soule Cheloha
2023-08-05cpu_idle_{enter,leave} are no-ops on riscv64, so just #definePhilip Guenther
2023-07-25statclock: move profil(2), GPROF code to profclock(), gmonclock()Scott Soule Cheloha
2022-11-19riscv64: switch to clockintrScott Soule Cheloha
2022-08-29use ansi volatile keyword, not __volatileJonathan Gray
2022-08-09riscv64: trigger deferred timer interrupts from splx(9)Scott Soule Cheloha
2022-06-10Implement CPU_BUSY_CYCLE() with the ZiHintPause extensionJeremie Courreges-Anglas
2022-01-01Remove unused function prototype.Mark Kettenis
2021-07-24Implement a workaround for the SiFive FU740 CIP-1200 errata.Mark Kettenis
2021-06-30Simplify the way we track the FPU state, using powerpc64 as a model.Mark Kettenis
2021-06-29SMP support. Mostly works, but occasionally craps out during boot.Mark Kettenis
2021-06-02kernel: introduce per-CPU panic(9) message bufferscheloha
2021-05-12add OpenBSD rcs idsJonathan Gray
2021-05-11whitespace cleanupTheo de Raadt
2021-05-09fpu_valid_opcode() did not correctly handle 16 bit fp instructionsJonathan Gray
2021-05-04The clock on RISC-V is architectural, so we really don't need theMark Kettenis
2021-04-30reduce diff to current arm64Jonathan Gray
2021-04-23Initial import of OpenBSD/riscv64Dale Rahn