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riscv64
Age
Commit message (
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Author
7 days
Cast atomic_load_int(9) to signed int when loading `securelevel'.
Vitaliy Makkoveev
7 days
move bus space extern to bus.h; ok mpi@
Jonathan Gray
14 days
order nam2blk by major number
Jonathan Gray
14 days
remove unused mainbus.h; ok miod@
Jonathan Gray
2024-11-10
replace uvm.h includes with uvm_extern.h where possible
Jonathan Gray
2024-11-07
Constify strings in symbol-related ddb interfaces, and make the iterator
Miod Vallat
2024-10-28
Unlock KERN_ALLOWKMEM. The `allowkmem' is atomically accessed integer.
Vitaliy Makkoveev
2024-10-21
define _MACHINE_ARCH not _MACHINE_ARC
Jonathan Gray
2024-10-17
use <machine/asm.h> not "machine/asm.h", for consistency
Jonathan Gray
2024-10-17
remove unneeded includes
Jonathan Gray
2024-10-16
remove unneeded frame.h and riscvreg.h includes
Jonathan Gray
2024-10-15
remove unneeded pte.h include
Jonathan Gray
2024-10-14
remove unneeded vmparam.h include from pte.h
Jonathan Gray
2024-10-14
remove unneeded device.h include
Jonathan Gray
2024-09-20
remove unneeded semicolons; checked by millert@
Jonathan Gray
2024-09-04
Fix some spelling.
Marcus Glocker
2024-08-18
don't need to put config_activate_children inside cfattach, because
Theo de Raadt
2024-08-06
The devicetree spec says in section 2.4:
Mark Kettenis
2024-07-14
Add elf_aux_info(3)
Jeremie Courreges-Anglas
2024-06-30
we don't need the NOBYFOUR space-savings option anymore, that codepath
Theo de Raadt
2024-06-26
return type on a dedicated line when declaring functions
Jonathan Gray
2024-06-23
If an ioctl(2) request isn't implemented we should return ENOTTY.
Mark Kettenis
2024-06-23
Fix previous commit; add missing label
Mark Kettenis
2024-06-20
Instead of allocating an arbitrary amount of extra space, let the EFI
Mark Kettenis
2024-06-17
KNF
Mark Kettenis
2024-06-17
When loading a device tree using the "mach dtb" command, give firmware
Mark Kettenis
2024-06-11
Enable UVM percpu cache on riscv64
Jeremie Courreges-Anglas
2024-06-11
Clamp CPU clock frequencies to [min, max] range when determining the
Mark Kettenis
2024-06-11
remove drm prototypes duplicating those in sys/conf.h
Jonathan Gray
2024-05-22
remove prototypes with no matching function and externs with no var
Jonathan Gray
2024-05-13
remove prototypes with no matching function
Jonathan Gray
2024-04-30
remove commented DEBUG_TIMER for timer driver removed in 2021
Jonathan Gray
2024-04-29
remove prototypes for removed functions
Jonathan Gray
2024-04-29
remove unused pmap_vp_remove()
Jonathan Gray
2024-04-19
Fix typo in comment
Jeremie Courreges-Anglas
2024-04-07
The RISC-V architecture has cache-coherent DMA... until it doesn't. This
Mark Kettenis
2024-04-06
Now that we support RISC-V CPUs that have MMUs with memory cachability
Mark Kettenis
2024-03-31
Enable rge(4).
Mark Kettenis
2024-03-29
Use SBI calls to reboot or power down the machine when the firmware
Mark Kettenis
2024-03-27
The RISC-V architecture specification says that memory read/writes are
Mark Kettenis
2024-03-26
The devicetree standard allows for multiple /memory nodes, each with
Mark Kettenis
2024-03-26
Implement support for the RISC-V UEFI Boot Protocol. This provides us
Mark Kettenis
2024-03-25
Add missing SFENCE.VMA instructions after switching page tables during
Mark Kettenis
2024-03-07
Enable dwxe(4)
Kevin Lo
2024-02-25
clockintr: rename "struct clockintr_queue" to "struct clockqueue"
Scott Soule Cheloha
2024-02-23
ddb(4): db_read_bytes/db_write_bytes: change dst/src parameter to void*
Scott Soule Cheloha
2024-02-21
revert r1.35
David Gwynne
2024-02-21
handle /reserved-memory nodes from device trees on arm64.
David Gwynne
2024-02-17
Add JH7100 I2C clocks.
Mark Kettenis
2024-02-03
Implement Multiple Message MSI support on arm64. As on amd64 this is
Mark Kettenis
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