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2022-09-10Remove pmap_collect() when a no-op, define __HAVE_PMAP_COLLECT otherwise.Miod Vallat
Use that define to shunt uvm_swapout_threads(), which is a noop when pmap_collect() does nothing. ok mpi@
2022-09-08Rename global ifnet TAILQKlemens Nanni
Naming the list like the struct itself makes for awful grepping. Call the global variable "ifnetlist" from now on. There used to be kvm(3) consumers in base picking up this symbol, but those have long been converted to other interfaces. A few potential ports users remain, same deal as sys/net/if_var.h r1.116 "Remove struct ifnet's unused if_switchport member": they get bumped. Previous users pointed out by deraadt OK bluhm
2022-09-08riscv64: cpu_initclocks: install tb_timecounter before cpu_startclock()Scott Soule Cheloha
In the future, the clock interrupt code will need a real timecounter to work correctly. Nudge the tc_init(9) call for tb_timecounter up before cpu_startclock().
2022-09-04spellingJonathan Gray
2022-09-02Constify nam2blk[], chrtoblktbl[] and octeon devmap[].Miod Vallat
ok mpi@ millert@
2022-09-01Stop setting d_bbsize and d_sbsize. Nobody has paidKenneth R Westerback
any attention for some time. ok otto@ as part of larger diff
2022-08-30Remove long unused WARN_REFERENCES macro; idea guenther@, ok jsg@ jca@Miod Vallat
2022-08-29use ansi volatile keyword, not __volatileJonathan Gray
ok miod@ guenther@
2022-08-09riscv64: trigger deferred timer interrupts from splx(9)Scott Soule Cheloha
In order to move riscv64 to a machine-independent clock interrupt subsystem, the riscv64 clock interrupt code needs to function without any specific knowledge of the clock interrupt schedule. The easiest way to achieve this (as we just did with powerpc and powerpc64) is, if the timer interrupt fires while the CPU is at or above IPL_CLOCK, defer clock interrupt work until the the timer interrupt is logically unmasked in splx(9). In particular, trigger the timer interrupt from plic_setipl() so the interrupt, if any, is pending before we handle soft interrupts. Because we're no longer deferring work until the next tick, we don't need to count pending statclock ticks in struct cpu_info. kettenis@ notes that the timer triggering code should be refactored into more generic code when we add support for a non-plic(4) riscv64 machine. Graciously fixed, compiled, and tested by jca@. Link: https://marc.info/?l=openbsd-tech&m=165931635410276&w=2 ok kettenis@
2022-07-27Support "empty" phandles in interrups-extended properties. This is neededMark Kettenis
to support the device tree binding for the "apple,admac" controller. ok visa@, patrick@
2022-07-12Use db_rint() in sfuart(4)Jeremie Courreges-Anglas
This lets me enter ddb(4) even when the riscv64 machines I manage get unusable because of NFS. Suggested by miod@, ok miod@ kettenis@
2022-06-28Remove unused field d_poll from struct cdevsw.Visa Hankala
OK miod@ mpi@
2022-06-26add a few missing drivers for recent nics, input from jmatthew kettenis ↵Stuart Henderson
mbuhl deraadt
2022-06-12Add stftemp(4), a driver for the temperature sensor integrated on theMark Kettenis
StarFive JH7100 SoC. ok jsg@
2022-06-10Implement CPU_BUSY_CYCLE() with the ZiHintPause extensionJeremie Courreges-Anglas
This may help save power but also improves performance in contended workloads. kettenis@ helped a lot: - pointing out the error in my newest diff - pointing out that the ZiHintPause had been ratified in early 2021 - testing this on his visionfive board ok kettenis@ libc make -j4 time before 17m39.06s real 22m13.85s user 34m27.88s system 17m35.60s real 22m15.01s user 34m28.51s system 17m40.78s real 22m14.89s user 34m42.91s system 17m40.61s real 22m06.99s user 34m29.58s system 17m42.79s real 22m08.04s user 34m33.19s system 17m39.21s real 22m11.27s user 34m23.18s system 17m32.81s real 22m13.84s user 34m09.67s system libc make -j4 time after 16m35.48s real 21m57.94s user 32m05.50s system 16m49.10s real 21m58.47s user 32m42.37s system 16m42.16s real 22m00.51s user 32m22.18s system 16m41.54s real 21m53.32s user 32m19.53s system 16m45.42s real 21m52.14s user 32m37.78s system 16m46.55s real 21m58.98s user 32m36.70s system
2022-06-09Add gpiorestart(4).Mark Kettenis
2022-06-08Add stfpinctrl(4).Mark Kettenis
2022-06-08Add stfpinctrl(4), a driver for the pinctrl/gpio block found on theMark Kettenis
StarFive JH7100 SoC. ok jsg@
2022-06-07Enable stfclock(4) and make xhci(4) attach to fdt.Mark Kettenis
2022-06-06Enable stfclock(4) and make xhci(4) attach to fdt.Mark Kettenis
2022-06-06Add stfclock(4), a driver for the clock controller found on the StarFiveMark Kettenis
JH7100 SoC. ok jsg@
2022-06-06Remove unused prototype.Mark Kettenis
Fix a whitespace issue.
2022-06-06The StarFive JH7100 SoC has peripherals that only support 32-bit DMAMark Kettenis
(in particular the dwmmc(4) and dwge(4) devices; there may be more). ok jsg@
2022-05-30Add sfgpio(4), a driver for the GPIO controller found on theMark Kettenis
SiFive FU740 SoC. ok jca@
2022-04-14ddb: constify command tablesChristian Weisgerber
ok jca@
2022-04-12ddb: simplify machine command handlingChristian Weisgerber
Define a consistently named db_machine_command_table[] across all archs that implement the MD "machine" command, and hook this into the main command table instead of patching it at runtime. ok mpi@ jca@
2022-04-06constify struct cfattachChristian Weisgerber
2022-03-23Trapping a riscv illegal instruction shouldn't print a console messageJeremie Courreges-Anglas
"Old debugging code obviously" deraadt@
2022-03-22Copy the FDT into a larger buffer such that we have space to add additionalMark Kettenis
nodes and properties to it like we do on arm64 and armv7. ok patrick@
2022-03-22Make sure kernel longjmp always returns 1 rather than what turns out to beMiod Vallat
in a register at call-time. with & ok jsg@
2022-03-22Fix wrong comment in sendsig(), and remove unused dumpframe()Miod Vallat
ok jsg@
2022-03-22Do not bother initializing a0 with a special value in setregs, that's aMiod Vallat
FreeBSDism we have no need for. ok jsg@
2022-03-22Change VM_MIN_ADDRESS to PAGE_SIZE to forbid mapping anything at virtualMiod Vallat
address zero, as done on all other platforms. ok deraadt@ kettenis@
2022-03-22Do not pretend there exist MD code for byte swapping yet provide copiesMiod Vallat
of the MI fallback code; ok deraadt@ jsg@
2022-03-14The current FDT code we use in the bootloader is buggy and will write intoMark Kettenis
memory beyond the actual FDT data structure when adding information to the device tree. This is especially problematic on ACPI systems where we add lots of information to the device tree based on ACPI tables. Fix the FDT code to never write beyond the end of the data structure and panic if we run out of free space. Raise the amount of free space frm 4K to 16K for the proto-FDT we use on ACPI systems. Bump the version number of the arm64 bootloader. ok visa@, patrick@
2022-02-24Fix kernel stack alignment on riscv64Visa Hankala
Pad trapframe and switchframe structs so that their size is a multiple of 16 bytes. This makes context switching and exception handlers keep kernel stack properly aligned. OK kettenis@
2022-02-24Reserve room for holding curcpu pointer in u-areaVisa Hankala
The tp register contains the curcpu pointer in kernel mode. The pointer has to be saved and replaced with the TCB pointer in the register when entering user mode. These steps are reversed when returning to kernel. The curcpu pointer is saved in the u-area. Explicitly reserve room for the pointer to make the saving more visible. OK kettenis@
2022-02-24Fix PIC_SYM() macro: it never needs to token paste, so it's notPhilip Guenther
dependent on __STDC__ and doesn't need the ## operator. ok jsg@
2022-02-23unifdef __ELF__Jonathan Gray
ok guenther@
2022-02-22Remove extra ;Visa Hankala
No functional change.
2022-02-22Clear frame pointer in cpu_fork() on riscv64Visa Hankala
This ensures the chain of call frames is terminated properly, preventing errors when unwinding kernel stacks. OK miod@ kettenis@
2022-02-22ddb: Improve stack unwinding on riscv64Visa Hankala
Add logic to navigate across trapframes. Stop unwinding if the frame pointer is clearly bad. Adjust output, and tweak details. OK miod@ kettenis@
2022-02-18Add mpfgpio(4), a driver for the PolarFire SoC MSS GPIO controller.Visa Hankala
Feedback and OK kettenis@
2022-02-16Add mpfiic(4), a driver for the PolarFire SoC MSS I2C controller.Visa Hankala
OK kettenis@
2022-01-18Add cdsdhc(4), a driver for the Cadence SD/SDIO/eMMC host controller.Visa Hankala
Tested on a PolarFire SoC.
2022-01-18plic: Fix cpuid handlingVisa Hankala
Make `cpu' signed so that the possible return value -1 from plic_get_cpuid() gets handled correctly in the (cpu < 0) condition. This prevents plic_attach() from updating sc_contexts[] out of bounds. When plic_get_cpuid() returns -1, ignore the entry and continue processing. The error is not fatal. It is normal that secondary CPUs are not found when running a non-MULTIPROCESSOR kernel on a multiprocessor machine. OK kettenis@
2022-01-17sfcc: Fix accidental spinningVisa Hankala
Adjust end condition so that sfcc_cache_wbinv_range() would not spin when (pa + len) is not cache line aligned. While here, fix parameter types of sfcc_cache_wbinv_range() as suggested by kettenis@. OK kettenis@ (earlier version), miod@
2022-01-16remove "for all AArch64 platforms" from commentJonathan Gray
removed from other archs in 2020 before riscv64 was imported
2022-01-12Remove -target riscv64-unknown-openbsd from CMACHFLAGS.Kevin Lo
ok kettenis@ deraadt@
2022-01-07.glue_7 is used for arm code calling thumb code, and .glue_7t is used forKevin Lo
thumb code calling arm code, no need to put these input sections at the text output section. ok jsg@ kettenis@
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