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8:8:8, and use the fast putchar code unconditionally: it turns out it
expects the background color as 4:8:4. This fixes the `character background
is too green and too light' effect that caused this code path to only be used
for black background, and the slower code for the rest.
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bus-specific attachment; impactreg.h and impactvar.h move from sgi/xbow/ to
sgi/dev/.
Teach the generic impact code how to code with pre-ImpactSR boards, which have
a slightly different register layout (information obtained from Peter Fuerst's
Linux IP28 patches).
Add an impact@gio attachment (unfortunately untested, no Impact GIO boards
here). All Indigo 2 graphics options should be supported now (assuming the
Extreme/Ultra will actually work with grtwo(4) out of the box).
Tested not to disturb operation on IP30.
** ATTENTION! If you are building IP27 or IP30 kernels, be sure to rm impact.d
** before building a new kernel.
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these among frame buffer drivers. No functional change.
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(IP20, IP22, IP24) in 64-bit mode, adapated from NetBSD. Currently limited
to headless operation, input and video drivers will get ported soon.
Should work on all R4000, R4440 and R5000 based systems. L2 cache on R5000SC
Indy not supported yet (coming soon), R4600 not supported yet either (coming
soon as well).
Tested to boot multiuser on: Indigo2 R4000SC, Indy R4000PC, Indy R4000SC,
Indy R5000SC, Indigo2 R4400SC. There are still glitches in the Ethernet driver
which are being looked at.
Expansion support is limited to the GIO E++ board; GIO boards with PCI-GIO
bridges not ported yet due to the lack of hardware, and this kind of driver
does not port blindly.
Most of this work comes from NetBSD, polishing and integration work, as well
as putting as many ``R4x00 in 64-bit mode'' erratas as necessary, by yours
truly.
More work is coming, as well as trying to get some easy way to boot install
kernels (as older PROM can only boot ECOFF binaries, which won't do for the
kernel).
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subspaces in the CCA_NC uncached memory space. However, being coherent,
there was never a need for bus_dma to use uncached addresses.
This means that, on the only systems where uncached_base was not set to
PHYS_TO_XKPHYS(0, CCA_NC), it was never used.
Remove the variable, and replace PHYS_TO_UNCACHED() with
PHYS_TO_XKPHYS(, CCA_NC). No functional change.
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i386. Stop abusing it on other archs for controling a shutdown by
pressing the soft power button:
* Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it
allows a power button shutdown.
* Make acpi(4)/acpibtn(4) honor hw.allowpowerdown.
* Switch the various power button intercepts on landisk, sgi, sparc64
and zaurus over to hw.allowpowerdown.
* Garbage collect the machdep.kbdreset sysctl on all archs other than
amd64 and i386.
ok miod@
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ok matthew@ tedu@, also eyeballed by at least krw@ oga@ kettenis@ jsg@
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a physical address [more precisely, something suitable to pass to pmap_enter()'sphysical address argument].
This allows MI drivers to implement mmap() routines without having to know
about the pmap_phys_address() implementation and #ifdef obfuscation.
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because it is always PCKBC_KBD_SLOT
ok miod@, krw@
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for both structs, the new members are 'bps' and 'msb', which
describe the number of bytes per sample and data alignment in the
sample, respectively. drivers must properly set these fields in
the 'query_encoding', 'set_parameters' and 'get_default_params'
hardware interface methods.
discussed with ratchov, deraadt
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ok miod@ some time ago
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and compare against them when attaching potential console drivers, to figure
out whether they indeed are acting are console devices or not.
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decode them when available; tested on Fuel and Origin 350.
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by syuu@; ok kettenis@
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before attaching wsdisplay; it was turning out harmless but using more
cpu time for nothing than necessary.
ok deraadt@
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this gives us working glass console on Fuel, as well as on Octane systems
with Odyssey graphics.
Joint work with jsing@
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struct intrhand, instead of having it malloc()'ed.
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* round blocksizes to multiples of 256 frames
* fix display of record.source.volume and add record.mic.preamp
mixer controls
* add recording support
ok kettenis@. ok ratchov@ on a slightly different version.
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subdevices; use this on iockbc to only perform the fuel workaround on the
onboard ioc.
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do this for us; PS/2 ports on CADduo boards attach keyboard and mouse now.
ok jsing@
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ioc(4) devices. Joint work with miod@.
Committed from the glass console on an SGI Fuel.
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attach, print it, and decide how many RX descriptors to use accordingly.
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system type list (which really is the system family) and a subsystem type.
No functional change yet.
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would stop RX operation if it had to cross a 4KB boundary during receive).
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header is properly aligned; speeds up RX buffer -> mbuf copies.
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while there, silence overzealous messages when the TX empty interrupt fires
before we disable it.
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- double the number of rx buffers.
- copy packets of 104 bytes or less entirely in the tx descriptor, instead of
only doing this for packets smaller than an Ethernet header.
- correctly disable the rx threshold interrupt. Otherwise, one received
frame every 64 would not be handled because we are not using this interrupt.
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for the new iec(4) driver. Reminded by brad@
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to prevent further abuse of it.
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onboard ioc(4) devices, and on Octane this is always a DS1687 wired to
IOC3 bytebus #1 and #2, while on Origin this is always a DS1742 wired to
IOC3 bytebus #0.
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figure out how the interrupt was routed from xbridge to xheart... (it bypasses
the regular `have xbridge send a xio interrupt packet' mechanism)
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specified in the kernel configuration file, but is provided by macebus(4)
as part of the child device attachment args, and provide both crime and
mace interrupt bitmasks; this allows us to only really enable interrupt
sources we care about, and to avoid invoking interrupt handler we don't need
to for the few mace interrupts multiplexed at the crime level.
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on all systems but O2 (to catch up soon). Also use the IOC4 MCR register to
figure out the IOC4 clock, instead of checking the widget control register,
to be consistent with iof(4).
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pick the right clock if the PCI bus the I/O board is on degrades to 33MHz.
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lines. (This is done only to make dmesg look nice)
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return zero on success and nonzero on failure.
This commit only performs mechanical changes for the existing emulops to
always return zero.
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Origin 350 and Tezro systems. While this chip provides serial ports, an ATAPI
interface and a PS/2 keyboard and mouse interface, this code currently only
attempts to support the serial ports.
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when rebooting.
ok deraadt@ jasper@
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bus_space_handle_t, pass them ioc's own bus_space_handle and bus_space_tag,
and have the children use bus_space_subregion() on it.
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when resetting the chip.
From Brad.
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significantly reduces the number of times the chip gets wacked at boot.
From brad, tested by me.
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MK48Txx). Entangled with preliminary changes which will hopefully eventually
lead to power(4) attaching on IP30 (but not finished yet).
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the chip is in, and honour it.
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