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Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.
ok kettenis
(Manpage follows shortly.)
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Origin 350 and Tezro systems. While this chip provides serial ports, an ATAPI
interface and a PS/2 keyboard and mouse interface, this code currently only
attempts to support the serial ports.
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commented symbolic constants.
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ethernet driver attaches; prevents interrupt storms on Octane caused by
the way ARCS initializes the chip, when not booting from the network.
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otherwise. Found the hard way by jasper@, playing with a bge card.
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bus_space_handle_t, pass them ioc's own bus_space_handle and bus_space_tag,
and have the children use bus_space_subregion() on it.
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PCI ROM into account, if any.
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- do not use a stinking extent to track bus_space_map allocations, but
directly map in XKPHYS instead. What are 64 bit address spaces good for
if we still need to use TLB for that?
- provide proper resource management extents to the MI pci code, so that,
in turn, the cardbus code can reuse them instead of providing their own.
- use the whole 4GB address space window for PCI I/O resources, just
because we can.
- make sure no device can get assigned address zero in I/O space, because
this address triggers a PCI error.
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class systems. Tested on O2 and Origin 200 with wi@pcmcia and xl@cardbus,
using a Ricoh 5C475-based cbb(4) board.
acx@cardbus doesn't work reliably yet, so your mileage may vary until more
bugs are fixed.
Thanks to matthieu@ for lending me some cardbus devices for testing.
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The firmware messes up I/O BARs, so whack those back to 0, such that the MI
PCI code initializes on an as-needed basis.
ok miod@
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where the common part to all bus_dmamap_load*() functions is implemented in
in an internal load_buffer routine.
This allows the xbridge-specific dma code to only provide this function,
instead of three; and this also brings us a working bus_dmamap_load_uio()
on all supported sgi machines, which in turns make crpyto(4) devices really
work. Tested with hifn(4).
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per-pci_chipset_t function to perform actual resource allocation.
Add the necessary bits to macepcibr(4), and enable ppb(4) on O2 kernels now.
Joint effort with kettenis@
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configuration register; this allows the driver to select ultra speed, which
this particular hardware supports.
From Linux, ok kettenis@
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bridge initialization if necessary; enable ppb on IP27 and IP30 kernels.
With feedback from kettenis@; macepcibr to gain the same functionality soon.
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Octane support. The Octane being a single-node system, address space is
ludicrous enough to allow the whole address space of every widget to be
directly accessible in whole, using the address bits reserved to nasid.
However, on IP27 and IP35, things do not work this way - while we still have
the low 16MB address space of each widget available (the so-called
``short window''), access to other parts of the wiget address space is done
through translation slots (IOTTE) at the Hub I/O space level, on a per-node
basis.
Given the imminent release lock, give up completely on ``large'' mappings
of widgets, and restrict ourselves to short window operation, all the time
(thus reinforcing the use of devio registers to map pci resources on xbridge).
A proper interface to request mappings of specific widget areas, either
directly on Octane, or through IOTTE if available on Origin, will appear
post-release.
No functional change (except from silently repairing Octane support which the
previous xbridge commit silently broke).
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is still unhappy due to ``interferences'' between the L1 console and the
brick's serial ports, unfortunately.
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used by onboard IOC chips, by forcing the IOC to trigger this interrupt,
and some help from the PCI bridge driver to report which interrupt has
fired through a fake PCI configuration register.
This works nicely on IP27 and IP35, but on IP30 the interrupt doesn't
happen, for some reason; so keep the existing heuristic in case the above
trick did not give us a valid interrupt number.
In case we got an interrupt, this will also detect IOC configurations where
there is actually one interrupt, should such configurations exist.
<rant style="beck">
I probably deserve to rot in hell for this abomination, but I won't mind
as long as the IOC designers who came with the bright ``let's use more than
one interrupt and defecate on the pci spec'' ideas are there, too.
</rant>
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config_search(), so that disabled or unconfigured child device appear in
dmesg as ``not configured''.
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information, instead of trying to attach whatever is defined in the
kernel configuration file.
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have a shared ethernet/superio interrupt source, so deal with this.
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adressing (no problem since we only support 64-bit mode).
ok miod@, jsing@
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an empty slot before the ioc card (such as on Fuel).
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partnumber, decide what components of the IOC3 really are available, and
how many interrupts to register.
Based on knowledge found in Linux source code, only tested on full-blown
IOC3 devices so far.
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ok miod@
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these are completely unrelated as long as there is only one pci bus per
bridge.
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else.
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Otherwise we get stuck interrupted by the ``tx empty'' condition.
Also, on Origin 200 the second interrupt vector has to be computed
differently, which adds to the ``I wish I never had looked at this code''
trauma.
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some years ago for KL enumeration, building on the existing XBow support
to limit ourselves to a single node for now.
This is a work-in-progress; it currently lacks complete interrupt code,
as well as PCI resource management. And there are likely bugs creeping
inside.
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SuperIO part, the Ethernet part needs a whole driver); kernel now boot
single user (or bsd.rd). Joint work with jsing@
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between instances, saving space in the kernel. feedback from many (some
incorporated, some left for future work).
ok deraadt, kettenis, "why not" miod.
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endianness conversion on pci bridges.
ok deraadt@ jsing@
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developer documentation some time ago.
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missing a driver for the ethernet part, and interrupt handling is not written
yet.
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inherited from OpenBSD/arc machines with ISA bus; mainbus children match on
device name and other hierarchies match on simplified locators.
As a bonus, attachment lines in dmesg will now print their locators.
ok jsing@
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for the cpu, contiguous from different bases for devices. This allows
memory above 256MB to be used with bus_dma (and we had really been lucky
with the first few large-memory builds).
Information about memory accesses taken from Linux.
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domain number such that we can distinguish between busses with the same bus
number that are behind different host bridges. Domains can be accessed by
using different device nodes.
ok deraadt@
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NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
From NetBSD
ok grange@ kettenis@
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