| Age | Commit message (Expand) | Author |
|---|
| 2009-10-31 | Do not override AS and LD, to be cross compilation friendly; noticed by syuu@ | Miod Vallat |
| 2009-10-31 | s/Mhz/MHz/, MHz is a multiple of the SI unit hertz (whose symbol is Hz). | Igor Sobrado |
| 2009-10-31 | Blinkenlichten on Octane. | Miod Vallat |
| 2009-10-30 | Support IP30 secondary cpu bootup. ok miod@ | Takuya ASADA |
| 2009-10-26 | Rename struct confargs to struct mainbus_attach_args for consistency and also | Miod Vallat |
| 2009-10-26 | Get rid of unused `frame' member of struct intrhand; only hardclock() needs | Miod Vallat |
| 2009-10-26 | Make pci_intr_string() on xbridge return both the xbridge irq and the crossbow | Miod Vallat |
| 2009-10-26 | Remove DS1687 vs DS742 runtime detection code; we only attach dsrtc on the | Miod Vallat |
| 2009-10-26 | Add support for the Octane power button to power(4). Took me a while to | Miod Vallat |
| 2009-10-26 | Add new xbow routines to explicitely trigger or clear an interrupt source, | Miod Vallat |
| 2009-10-26 | Oops; forgot to add this file in previous commit (overhaul of macebus | Miod Vallat |
| 2009-10-26 | Better crime/mace interrupt handling; interrupt information is no longer | Miod Vallat |
| 2009-10-23 | Fix logic in ip27_hub_intr_makemasks() to correctly {un,}mask interrupt | Miod Vallat |
| 2009-10-22 | Completely overhaul interrupt handling on sgi. Cpu state now only stores a | Miod Vallat |
| 2009-10-22 | With the splx() changes, it is no longer necessary to remember which interrupt | Miod Vallat |
| 2009-10-22 | Implement bus_space_vaddr() for macepcibr. | Miod Vallat |
| 2009-10-22 | Make macebus_intr_disestablish() signature sane, and update its caller. | Miod Vallat |
| 2009-10-22 | The recent cleanups make blatantly visible that the pending_int handler | Miod Vallat |
| 2009-10-22 | unifdef -DIMASK_EXTERNAL to the mips code. Support for interrupt masking at | Miod Vallat |
| 2009-10-22 | Replace intrmask_t with uint32_t. This types only describes interrupt masks | Miod Vallat |
| 2009-10-22 | Introduce a logical xbpci(4) device between xbridge and pci, since more than | Miod Vallat |
| 2009-10-22 | Correctly initialize the second HUB PI interrupt and calias registers on | Miod Vallat |
| 2009-10-21 | Replace IP32 hw_setintrmask() .S routine with a two line C routine. | Miod Vallat |
| 2009-10-21 | In atoi(), only check for a base indication iff the string starts with `0' | Miod Vallat |
| 2009-10-19 | Correct a target name so that we don't rebuild vers.o (and then | Philip Guenthe |
| 2009-10-16 | Honour serial console speed on O2 too. | Miod Vallat |
| 2009-10-16 | Make Octane kernels compile again after recent changes. My bad. | Miod Vallat |
| 2009-10-16 | Get serial console speed from prom, and use it instead of hardcoding 9600 bps, | Miod Vallat |
| 2009-10-15 | regen | Miod Vallat |
| 2009-10-15 | Sort widgets by type instead of manufacturer code, add some TIO widgets, | Miod Vallat |
| 2009-10-15 | The Octane boot PROM is accessible through the PCI space of the on-board i/o | Miod Vallat |
| 2009-10-14 | On coherent systems, all bus_dmamap_sync() needs to do is writebacks, no | Miod Vallat |
| 2009-10-14 | On IP30 and IP35 systems, try harder to figure out exactly what model we are | Miod Vallat |
| 2009-10-14 | Report the crossbow widget part of bedrock as PXBow for consistency with | Miod Vallat |
| 2009-10-14 | Add some comments to explain why the DMA32 physseg is really 2**31 bytes | Miod Vallat |
| 2009-10-13 | Make iof(4) pass its bus speed to children, this in turn allows com(4) to | Miod Vallat |
| 2009-10-11 | Make sure com@io[cf] attachment stanzas with locators win over generic com* | Miod Vallat |
| 2009-10-10 | Simplify interrupt address programming to avoid the need to act differently | Miod Vallat |
| 2009-10-10 | Add extra com@iof stanzas to have the first IOC4 card attach com0-3, instead | Miod Vallat |
| 2009-10-10 | Locators for extra IOC3 cards. | Miod Vallat |
| 2009-10-09 | initialize the disk size instead of getting a random value (always 0) off | Theo de Raadt |
| 2009-10-08 | Program the widget interrupt address register as a whole 64 bit register | Miod Vallat |
| 2009-10-08 | regen | Miod Vallat |
| 2009-10-08 | Recognize the Bedrock as an XBow instead of reporting it as ``unknown | Miod Vallat |
| 2009-10-08 | Recognize more brick types and probe fooX bricks in the same order as | Miod Vallat |
| 2009-10-08 | PIC actually comes with two sets of widget registers, with different IDs, | Miod Vallat |
| 2009-10-07 | Attach DS1742 style dsrtc to iof (IOC4) too. | Miod Vallat |
| 2009-10-07 | Do not truncate bridge register values to 32 bits, allows the few 64 bit PIC | Miod Vallat |
| 2009-10-07 | ipending, cpl moved into cpu_info | Takuya ASADA |
| 2009-10-07 | Try to keep existing IOC4 mappings, the same way we do on IOC3, in case | Miod Vallat |
