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AgeCommit message (Collapse)Author
2010-04-04Fix bus_space_{read,write}_raw_region_# operation.Miod Vallat
2010-04-02Remove parent/slave mode of rbus as nothing uses it.Jonathan Gray
ok kettenis, sgi usage of rbus_new_body() pointed out by miod
2010-03-31Add bnx firmware on installation media; this causes a media oflow, soMiod Vallat
enlarge bsd.rd filesystem; this in turn causes a cd oflow, so enlarge cd filesystem. ok jsing@ deraadt@
2010-03-29PMAP_CANFAIL for bus_dmamem_map on all other architectures (and someOwain Ainsworth
whitespace tweaks on i386 so that it matches). ok kettenis@
2010-03-28Add envy(4), as found on Tezro; attaches, not tested yet because marco@ doesn'tMiod Vallat
seem to have speakers at home.
2010-03-28Correctly account devio usage, instead of relying upon unused devio registersMiod Vallat
being set to zero; this allows a full PIC bus to correctly configure I/O resources. While there, when initializing a ppb, setup I/O resources before memory resources; without this a ppb connected to a PIC could not get I/O resources if devices behind it would use both I/O and memory resources.
2010-03-22Put back bnx(4) now that claudio@ has made the driver work on big endianMiod Vallat
systems with page size different than 4KB... 4 months ago.
2010-03-22On SGI IP35 systems, get SPD memory records from L1 and attach spdmem toMiod Vallat
decode them when available; tested on Fuel and Origin 350.
2010-03-21let this compile without DIAGNOSTIC; from miodTheo de Raadt
2010-03-21add glass console support to the ramdisks; from miodTheo de Raadt
2010-03-21Update KL structure definitions to match IP35 use of previously unused fields.Miod Vallat
No functional change yet.
2010-03-21Fix widget probe order for BASEIO boards and P-Brick.Miod Vallat
2010-03-20Add code to tell Origin 200 and Origin 2000 / Onyx 2 apart.Miod Vallat
Use this to correctly handle the onboard IOC3 chip configuration on O2k (two IOC3 chips to be able to provide four serial ports, and the other subdevices are split accross the two IOC3 chips).
2010-03-15Do not leak mbuf in the TX path when a TX error occurs; found the hard wayMiod Vallat
by syuu@; ok kettenis@
2010-03-13Make sure non-console impact_screen struct gets zeroed upon allocation,Miod Vallat
otherwise backing store may not get allocated for it; "go ahead" kettenis@
2010-03-13Octane PROM picks highest graphics widget as console, not lowest;Miod Vallat
"go ahead" kettenis@
2010-03-08Correctly initialize all members of struct wsemuldisplaydev_attach_argsMiod Vallat
before attaching wsdisplay; it was turning out harmless but using more cpu time for nothing than necessary. ok deraadt@
2010-03-08fix a miod typo (it has to be a typo; miod makes no real mistakes)Theo de Raadt
2010-03-07Minimalistic driver for the ImpactSR (Mardigras) video option found on olderMiod Vallat
Octane systems, as well as some Onyxes. With special permission to change a systemwide .h file and add a manpage from deraadt@ Magic numbers and operation sequencing borrowed from Linux; tested on Octane + ESI. ok deraadt@
2010-03-07Allow iockbc(4) and odysseey(4) to act as console devices and attach early;Miod Vallat
this gives us working glass console on Fuel, as well as on Octane systems with Odyssey graphics. Joint work with jsing@
2010-03-07On Origin-like systems, get glass console information (if any) from theMiod Vallat
fake ARCBios component structures associated to the KL configuration. The ARCBios data tells us if the device is the output console, and the KL component data tells us its node and widget numbers.
2010-03-07Add an MD interface for PCI drivers to be able to retrieve the node and widgetMiod Vallat
number the PCI bus they are on is connected to. Will be used shortly to help the console device selection logic.
2010-03-06Fix typos.Joel Sing
2010-03-04Introduce odyssey(4), a driver for the SGI VPro (aka Odyssey) graphicsJoel Sing
card, which can be found in Octane, Octane2, Fuel, Tezro and Onyx systems. ok miod@
2010-03-03Store ARCBios variables before machine specific setup is performed andJoel Sing
make console selection on a per machine basis. Whilst here store the keyboard layout ('keybd') and graphics state ('gfx') variables for future use. ok miod@
2010-02-28Pass L2 cache size in struct cpu_hwinfo, so that bootstrap of secondaryMiod Vallat
processors can display correct data. Now cpu1 on octane is correctly reported in dmesg.
2010-02-13Since the TLB handler exception code is now always a trampoline to branchMiod Vallat
to the handler code in the kernel, we can use relative branches in it to make it a bit faster. Also, get rid of the tlbmiss handler and have both the tlb and xtlb refill exceptions branch to the xtlbmiss handler.
2010-02-01- add and enable puc(4) (only com, i didn't test lpt)Jasper Lievisse Adriaanse
ok miod@
2010-01-26Sprinkle some write buffer flushes, copied from powerpc; preventsMiod Vallat
lock count from becoming negative under bad timing circumstances.
2010-01-22Move is_memory_range() from mips64 mem.c to a per-architecture location; thisMiod Vallat
allows /dev/kmem to access the 256MB alias of the low memory on loongson, which in turns makes procmap(8) happy.
2010-01-19Compute the right value for hw.ncpusfound sysctl on IP30 regardless of theMiod Vallat
value of MAXCPUS.
2010-01-18Kernel configuration for multiprocessor Octane machines. There are a fewMiod Vallat
rough edges left to be polished, but the kernel is otherwise stable.
2010-01-18In the interrupt handler, only attempt to acquire kernel_lock if coming fromMiod Vallat
an ipl lower than IPL_SCHED, not IPL_IPI.
2010-01-18Define IPL_SCHED as IPL_CLOCK, not IPL_HIGH.Miod Vallat
2010-01-14Let the nmi handler code compile on non-MULTIPROCESSOR kernels.Miod Vallat
2010-01-13Freeze the secondary CPU later in the nmi handling, and put it in a betterMiod Vallat
state from a ddb point of view.
2010-01-13Crude handler for the Octane NMI button, for kernels compiled withMiod Vallat
option DDB.
2010-01-09Move cache information from global variables to per-cpu_info fields; thisMiod Vallat
allows processors with different cache sizes to be used. Cache management routines now take a struct cpu_info * as first parameter.
2010-01-09Define struct cpu_hwinfo, to hold hardware specific information about eachMiod Vallat
processor (instead of sys_config.cpu[]), and pass it in the attach_args when attaching cpu devices. This allows per-cpu information to be gathered late in the bootstrap process, and not be limited by an arbitrary MAX_CPUS limit; this will suit IP27 and IP35 systems better. While there, use this information to make sure delay() uses the speed information from the cpu it is invoked on.
2010-01-08MP-safe FPU handling. ok miod@Takuya ASADA
2010-01-05Dynamic allocation for ASID and ASID generation number on struct pmap. ok miod@Takuya ASADA
2010-01-03Use a split genassym.cf scheme on mips64 ports. Don't forget to rerun config(8).Miod Vallat
2010-01-01Make sure we grab the kernel lock before invoking trapsignal().Miod Vallat
2009-12-28Fix compile error caused from previous commitTakuya ASADA
2009-12-28MP-safe pmap implemented, enable IPI in interrupt handler to avoid deadlock.Takuya ASADA
ok miod@
2009-12-26Register an interrupt handler for PCI error conditions (as well as xtalkMiod Vallat
errors at the widget level). Extremely crude for now.
2009-12-25Pass both the virtual address and the physical address of the memory rangeMiod Vallat
when invoking the cache functions. The physical address is needed when operating on physically-indexed caches, such as the L2 cache on Loongson processors. Preprocessor abuse makes sure that the physical address computation gets compiled out when running on a kernel compiled for virtually-indexed caches only, such as the sgi kernel.
2009-12-23- add and enable uthumJasper Lievisse Adriaanse
ok miod@
2009-12-18Add lofn(4) and ubsec(4) crypto devices. From Brad.Joel Sing
2009-12-18More Ethernet drivers - sf(4), cas(4), vge(4) and ciphy(4) for use byJoel Sing
vge(4). From Brad.