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2007-06-06now that all partition size/offsets are potentially 64-bit, change theTheo de Raadt
type of all variables to daddr64_t. this includes the APIs for XXsize() and XXdump(), all range checks inside bio drivers, internal variables for disklabel handling, and even uvm's swap offsets. re-read numerous times by otto, miod, krw, thib to look for errors
2007-05-29start of dumpconf() unification, which one day we can pray will be MITheo de Raadt
(and part of setroot); ok miod
2007-05-29Use atomic operations to operate on netisr, instead of clearing it at splhigh.Miod Vallat
This changes nothing on legacy architectures, but is a bit faster (and simpler) on the interesting ones.
2007-05-28Move the MSIZE, MCLSHIFT, MCLBYTES and the MCLOFSETThordur I. Bjornsson
mbuf constants from MD param.h to MI param.h. Besides being the same on every arch, things will most probly break if any arch has different values then the others. The NMBCLUSTERS constants needs to be MD though; ok miod@,krw@,claudio@
2007-05-27pagemove() is no longer used.Miod Vallat
2007-05-27Make sure the minaddr hint for uvm_km_suballoc() calls is always initialized.Miod Vallat
ok pedro@
2007-05-26Dynamic buffer cache. Initial diff from mickey@, okay art@ beck@ toby@Pedro Martelletto
deraadt@ dlg@.
2007-05-26tyopsMiod Vallat
2007-05-20Fix KERNBASE, so that profiling kernels initialize (but profiling is brokenMiod Vallat
at the moment).
2007-05-18Instead of checking whichqs directly, add a "sched_is_idle()" macro toArtur Grabowski
sys/sched.h and use that to check if there's something to do. kettenis@ thib@ ok
2007-05-16The world of __HAVEs and __HAVE_NOTs is reducing. All architecturesArtur Grabowski
have cpu_info now, so kill the option. eyeballed by jsg@ and grange@
2007-05-15Remove the MI implementation of mutexes and remove the __HAVE_MUTEXArtur Grabowski
option. Every architecture implements mutexes now.
2007-05-14Switch sh to __HAVE_CPUINFO. The least possible effort for now.Artur Grabowski
deraadt@ ok
2007-05-10evcnt & friends were replaced by a proper interrupt counting mechanism 3 ↵Theo de Raadt
years ago; ok miod
2007-05-05Define MUTEX_OLDIPL where they were missing, will be used (reasonably) shortly.Miod Vallat
2007-05-01Simple monoprocessor mutex implementation, faster than the MI code, four leftMiod Vallat
to go.
2007-04-29machdep.led_blink sysctl for landisk, also move cpu_sysctl() code and relatedMiod Vallat
variables from arch/sh/ to arch/landisk/. ok deraadt@
2007-04-05Disable interrupts around bit operations for propert atomicity against them.Miod Vallat
2007-03-19Default to writeback cache.Miod Vallat
2007-03-17Do not start lines printed by the kernel with '<' so that syslog won't getMiod Vallat
confused.
2007-03-15Since p_flag is often manipulated in interrupts and without biglockArtur Grabowski
it's a good idea to use atomic.h operations on it. This mechanic change updates all bit operations on p_flag to atomic_{set,clear}bits_int. Only exception is that P_OWEUPC is set by MI code before calling need_proftick and it's automatically cleared by ADDUPC. There's no reason for MD handling of that flag since everyone handles it the same way. kettenis@ ok
2007-03-13Move UKC later in the boot process, so that it can use malloc().Miod Vallat
2007-03-13It is safe to run tlb_exception() at the pre-fault ipl.Miod Vallat
2007-03-05Add pmap_prefer() for SH4, from NetBSD; ok drahn@Miod Vallat
2007-03-05Prevent a NULL pointer dereference in __pmap_kptp_lookup(); from NetBSDMiod Vallat
2007-03-05Lower the ipl to what it was at the time of the trap in general_exception,Miod Vallat
instead of remaining at splhigh; from NetBSD ok drahn@
2007-03-05Work around a virtual aliasing conflict issue. Basically allow multipleDale Rahn
readers but only one writer on a physical page. Not the most optimal, but has been tested. ok miod@
2007-03-03Kernel crash dumps and associated libkvm bits for landisk.Miod Vallat
2007-03-02Move landisk to hardware floating point. At the moment the FPU context isMiod Vallat
always saved upon context switches, as FPU registers are heavily used for long long computations (don't ask). Gcc default to -m4. Credits to drahn@ otto@ and deraadt@ for feedback and help testing. Upgrade procedure if you don't want to use the damn snapshots: - build and install new kernel, reboot off it - build new gcc, do not install it yet - make includes - install new gcc - build and install lib/csu and lib/libc - make build
2007-02-28do not bother printing 5 lines of cpu information which is always, onTheo de Raadt
every machine, exactly the same. only print the most interesting bits ok miod, tested martin
2007-02-26Zero rval[1] in setregs.Miod Vallat
2007-02-26FPU disabled bit on SH4 is not a ``must be zero'' bit, but userland shall notMiod Vallat
be allowed to fiddle with it anyway.
2007-02-26Fix spurious right brace in some decoders, and always print the hex value forMiod Vallat
unrecognized opcodes.
2007-02-19only make this interface available to the kernel for now, discussed withaTheo de Raadt
rt and such; tested and ok miod drahn
2007-02-11typo in commentMartin Reindl
2007-02-06Define trap #0x81 for cache range flush, will be necessary soon for gccMiod Vallat
trampoline code and ld.so.
2007-02-06Use uvm_grow() instead of rolling our own inline version.Miod Vallat
2007-02-06Add machine/atomic.h to all architectures and define two operationsArtur Grabowski
right now that are supposed to be atomic with respect to interrupts and SMP: atomic_setbits_int and atomic_clearbits_int. All architectures other than i386 and amd64 get dummy implementations since at first we'll be replacing operations that are done with "a |= bit" and "a &= ~bit" today. More proper implementations will follow kettenis@, miod@ ok
2007-01-15power(4) driver for the power switch on many landisk models, hookedMartin Reindl
up to machdep.kbdreset; modelled after the sparc64 power(4) driver discussed with miod@ and jsg@
2006-12-14Make pci subsystem aware of domains. Each host bridge gets assigned a uniqueMark Kettenis
domain number such that we can distinguish between busses with the same bus number that are behind different host bridges. Domains can be accessed by using different device nodes. ok deraadt@
2006-12-14Reset BBRB if we exit from a process that was single-stepping. Prevents aMark Kettenis
process that re-uses its ASID from getting random SIGTRAPs. ok miod@, mickey@
2006-12-05Allow kmem to work, might not quite be right yet, but allows basicDale Rahn
functionality. sort of ok miod@
2006-11-29Remove cpu_swapin() and cpu_swapout(), they are no longer necessary (exceptMiod Vallat
for cpu_swapin() on hppa* which is kept).
2006-11-28Implement PT_STEP.Mark Kettenis
2006-11-27Add PT_STEP.Mark Kettenis
2006-11-20serial drivers should use spltty, not splserial.Dale Rahn
2006-11-19Use symbol information, when available, to display branch destinations.Miod Vallat
2006-11-17sorry miod, but this version locks the machine up rather fastTheo de Raadt
2006-11-16pagemove() this time without an accidental line removalMiod Vallat
2006-11-16backout pagemove() diff; does not workTheo de Raadt
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