| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2000-11-17 | seems the qe/mace combination needs a delay between accesses to the | Jason Wright | |
| two chips. Better fix for the NMI problem. | |||
| 2000-11-16 | - remove other media types, the MACE isn't as bright as one would hope | Jason Wright | |
| - always set it to autoselect, tp - remove the wait for media stuff: appears to be a local issue on - simplify the ifmedia callbacks appropriately | |||
| 2000-11-16 | wait for the MACE to figure out whether it has media or not, and then | Jason Wright | |
| clear interrupt status and such before enabling rx and tx. | |||
| 2000-11-16 | - Fix the NMI problem: it seems the qec channel reset also resets the MACE, and | Jason Wright | |
| a race condition existed where after a qec channel reset, accesses to the MACE would cause an NMI: so wait for the MACE to come out of reset before accessing. - add ifmedia support (mainly so I can get at the link status from other code) - move some of the spl handling around (more correct) - rewrite qe_mcreset() again so that all it does is set the multicast filter - use bzero to initialize the buffers and descriptors - rearrange the MACE setup to conform to the suggestions in the datasheet | |||
| 2000-06-18 | hmm, you'd never know these started out as if_ie.c.... | Jason Wright | |
| 1999-12-08 | fix mbuf chain allocation to comply with m_devget() way. | Jason Wright | |
| 1999-02-24 | better promisc & allmulti handling | Jason Wright | |
| 1999-02-08 | match be & qe as part of the bootpath | Jason Wright | |
| 1998-11-02 | First step at unifying qe & be drivers: | Jason Wright | |
| o qe & be drivers now only access qec globals directly at interrupt time o more initialization done in qec_reset o qe & be drivers handle the qec internal buffer identically o nuked unused variables | |||
| 1998-10-21 | The qec global reset should only be allowed to happen once per qec card, not | Jason Wright | |
| once per channel init. | |||
| 1998-10-20 | o Only read the per-channel status reg if the global int mask says something | Jason Wright | |
| interesting happened. o Base all interrupt decisions on per-channel status reg. | |||
| 1998-10-19 | Use register definitions from AMD databook. | Jason Wright | |
| 1998-10-19 | Support for the qec+qe (SBus QuadEthernet board) | Jason Wright | |
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