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path: root/sys/arch/sparc64/include
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2018-03-22In vldcp(4), initialize lc_rx_state to a magic value which is notStefan Sperling
used by the hypervisor interface. This allows the driver to sync up with the firmware's Rx channel state (DOWN/UP/RESET) upon the first interrupt, and repair inconsistent Rx channel head/tail queue state if necessary. Unwedges another interrupt storm observed when starting ldomd on my T5220 after a reboot. In case the firmware's Rx queue head and tail are initially not equal, the normal interrupt handling path will not operate as expected due to the interrupt storm, and we never told the firmware to shut up. Other cbus(4) drivers might benefit from a similar fix, but we're too close to release for experiments, so I'm just fixing vldcp(4). ok kettenis@ deraadt@
2018-03-05#define _MAX_PAGE_SHIFT in MD _types.h as the maximum pagesize an archTheo de Raadt
needs (looking at you sgi, but others required this before). This is for the circumstances we need pagesize known at compile time, not getpagesize() runtime. Use it for malloc storage sizes, for shm, and to set pthread stack default sizes. The stack sizes were a mess, and pushing them towards page-aligned is healthy move (which will also be needed by the coming stack register checker) ok guenther kettenis, discussion with stefan
2018-02-19Convert sparc64 to MI mutex.Martin Pieuchot
ok dlg@
2018-01-13Define and use IPL_MPFLOOR in our common mutex implementation.Martin Pieuchot
ok kettenis@, visa@
2018-01-12Unify <machine/mutex.h> a bit further.Martin Pieuchot
`mtx_owner' becomes the first field of 'struct mutex' on i386/amd64/arm64. ok visa@
2017-12-06Implement support for using interrupt cookies in vbus(4) and vpci(4) asMark Kettenis
introduced in version 3.0 of the Interrupt APIs group. This makes it possible boot OpenBSD on SPARC T7/M7 hardware (although there still may be issues with the onboard mpii(4) controller).
2017-12-03Rename ci_number to ci_cpuid to match other archs.Martin Pieuchot
ok visa@, kettenis@, deraadt@
2017-10-24Use "static inline" instead of "extern inline" for compatibility withMark Kettenis
proper C99 compilers. ok deraadt@, visa@, mpi@
2017-10-17Add a machine-independent implementation for the mplock.Visa Hankala
This reduces code duplication and makes it easier to instrument lock primitives. The MI mplock uses the ticket lock code that has been in use on amd64, i386 and sparc64. These are the architectures that now switch to the MI code. The lock_machdep.c files are unhooked from the build but not removed yet, in case something goes wrong. OK mpi@, kettenis@
2017-09-05Move mutex, condvar, and thread-specific data routes, pthread_once, andPhilip Guenther
pthread_exit from libpthread to libc, along with low-level bits to support them. Major bump to both libc and libpthread. Requested by libressl team. Ports testing by naddy@ ok kettenis@
2017-07-04Export our atomic definitions to userland instead of gcc builtins.Martin Pieuchot
ok kettenis@, dlg@
2017-06-29kill RCSID macros; discussed with millertTheo de Raadt
2017-06-23Unbreak profiling assembly functions in userland by defining theMartin Pieuchot
correct prologue if compiled with -DPROF. ok deraadt@
2017-05-29Kill SPINLOCK_SPIN_HOOK, use CPU_BUSY_CYCLE() instead.Martin Pieuchot
ok visa@, kettenis@
2017-05-27Move SPINLOCK_SPIN_HOOK to the header used by other archs in order toMartin Pieuchot
prepare the terrain for MI locks. ok kettenis@
2017-05-25tweak sparc64 membars as a step toward making them usable in userland.David Gwynne
specifically, dont rely on magic in ctlreg to implement membars. moving that to atomic.h would add a lot of pollution to the namespace, so move to passing the membar options to a single __membar macro. this tweaks everything that was using the ctlreg backend to either use an appropriate membar_foo(), or to use __membar() in the MD code. ok kettenis@
2017-05-08add a BUS_DMA_64BIT flag to bus_dma on all our archs.David Gwynne
this is so drivers can advertise that they can handle 64 dma addresses to the platform. it may choose to handle dmamaps differently based on this flag. tweaks and ok tom@ ok kettenis@
2017-04-20Hook up mutex(9) to witness(4).Visa Hankala
2017-04-20Use register names without the % prefix in the global register variableMark Kettenis
declarations since clang doesn't register the %-prefixed ones.
2017-04-16Remove some defines marked #ifdef notyet, which really is #ifdef notever.Mark Kettenis
Reduces the diffs with other architectures.
2017-04-13Provide mips64 with kernel-facing TCB_{GET,SET} macros that store itPhilip Guenther
in struct mdproc. With that, all archs have those and the __HAVE_MD_TCB macro can be unifdef'ed as always defined. ok kettenis@ visa@ jsing@
2017-02-13whitespace tweak. no functional change.David Gwynne
2017-02-08In exec_elf.c: expand ELFNAME(), ELFNAME2(), and ELFNAMEEND() exceptPhilip Guenther
leaving out the size, so that ELFNAME2(exec,makecmds) becomes exec_elf_makecmds instead of exec_elf{32,64}_makecmds and then delete the ELFNAME2() and ELFNAMEEND() macros. Move the prototypes for functions local to exec_elf.c to there from exec_elf.h. Simplify the SMALL_KERNEL conditionals around the ELF coredump code. Change exec_conf.c to use the size-generic names and macros Remove exec_elf{32,64}.c and just build exec_elf.c; delete the _KERN_DO_ELF and _KERN_DO_ELF64 #defines. ok jca@, encouragement from deraadt@ and tom@
2016-09-25Remove more duplicated includesFrederic Cambus
OK jca@, deraadt@
2016-09-17Use the asm global register extension for the TCB pointer in userspacePhilip Guenther
as it's simpler to understand and generates better code. ok kettenis@
2016-09-04TCB_GET_MEMBER() is no longer used after the TIB changesPhilip Guenther
2016-09-03Increase the number of mbufs on most architectures. This is basedAlexander Bluhm
on a guess how much memory a typical machine has. If the value is too high, users may run out of kernel memory. Then we will have to adjust this again. OK claudio@ deraadt@
2016-08-17use a register variable to get at the curcpu pointer in %g7David Gwynne
this lets us define curcpu(), cpu_number(), etc as derefs of this variable rather than having to write asm to copy it into another register for the same derefs. this provides shorter inlined code that wastes less registers. ok kettenis@ who notes we use this these on other archs already
2016-08-17we have some spare interrupt levels, so move softnet above softclock.David Gwynne
ok kettenis@
2016-06-13rework sparc64 splfoo functions to be more consistent with other archsDavid Gwynne
this also moves us toward having an MI splraise(). sparc64 (and sparc) are different to the other archs because they have macros that build templates. each spl uses that macro to create an instance of an inline function specific to that spl call. this moves it to having a single splraise inline that the spl api is defined with. eg, #define splfoo() _splraise(IPL_FOO). ok kettenis@
2016-06-07remove splsoftfd and splausoftDavid Gwynne
theyre unused. ok kettenis@
2016-05-27Remove the non ELF macrosTheo de Raadt
ok millert
2016-05-10SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookieTheo de Raadt
inside the sigcontext. sigreturn(2) checks syscall entry was from the exact PC addr in the (per-process ASLR) sigtramp, verifies the cookie, and clears it to prevent sigcontext reuse. not yet tested on landisk, sparc, *88k, socppc. ok kettenis
2016-05-04Some hardware (such as the onboard dc(4) of the Netra X1) has a broken DMAMark Kettenis
engine that might attempt to read beyond the end of the buffer that was programmed. The IOMMU catches this "DMA overrun" and throws an unrecoverable error at us, at which point we have no choice but to panic. To avoid this implement a BUS_DMA_OVERRUN flag that maps an additional scratch page at the end of the vdma address range. DMA requests will spill over into this page, which just returns zeroes. Thanks to matthieu@ for giving me access to a machine with the problem. ok deraadt@, beck@
2016-05-04Initial support for MSI-X. Only supported on amd64 for now. I have diffs toMark Kettenis
actually use this in em(4) and xhci(4), but I'm not committing those yet because we almost certainly need to save and restore the MSI-X registers during suspend/resume. However, this allows mpi@ to play with multiple-vector support in networking hardware. Requested by mpi@ ok mlarkin@, mikeb@
2016-04-27G/C DDB_REGS.Martin Pieuchot
2016-03-07Sync no-argument function declaration and definition by adding (void).Christian Weisgerber
ok mpi@
2016-02-27Rename kdb_trap() into db_ktrap().Martin Pieuchot
The goal is to include it in the list of functions that must not be instrumented. All ddb(8) functions should be in this list and have their names start with 'db_'. ok visa@, deraadt@
2015-11-01Remove the definition of USRTEXT. It has no relevance outside of the non-PIEMiod Vallat
a.out world. ok deraadt@ kettenis@
2015-09-30Use consistant whitespace/comments for #define'ing LABELSECTOR,Kenneth R Westerback
LABELOFFSET and MAXPARTITIONS. Easier on the eye when scanning through all these files. No functional change.
2015-09-27Store the target CPU in "struct intrhand" and use it in intr_barrier().Mark Kettenis
Also use it wherever we configure the hardware to direct interrupts to the right CPU.
2015-09-26lint is dead and C99 may be old enough to drive a car: delete LONGLONGPhilip Guenther
comments ok millert@
2015-09-13Introduce intr_barrier(4), an interface that guarantees that an interruptMark Kettenis
handler that was running has finished. ok miod@, guenther@
2015-08-30Provide remaining arch with END() macro for setting calculated size onPhilip Guenther
symbols in ASM ok deraadt@ mpi@
2015-08-29_NLIST_DO_ELF is no longer needed: it's the only optionPhilip Guenther
ok deraadt@
2015-08-28Add support for switching CPUs in ddb on sparc64.Mark Kettenis
2015-07-02introduce srp, which according to the manpage i wrote is short forDavid Gwynne
"shared reference pointers". srp allows concurrent access to a data structure by multiple cpus while avoiding interlocking cpu opcodes. it manages its own reference counts and the garbage collection of those data structure to avoid use after frees. internally srp is a twisted version of hazard pointers, which are a relative of RCU. jmatthew wrote the bulk of a hazard pointer implementation and changed bpf to use it to allow mpsafe access to bpfilters. however, at s2k15 we were trying to apply it to other data structures but the memory overhead of every hazard pointer would have blown out significantly in several uses cases. a bulk of our time at s2k15 was spent reworking hazard pointers into srp. this diff adds the srp api and adds the necessary metadata to struct cpuinfo on our MP architectures. srp on uniprocessor platforms has alternate code that is optimised because it knows there'll be no concurrent access to data by multiple cpus. srp is made available to the system via param.h, so it should be available everywhere in the kernel. the docs likely need improvement cos im too close to the implementation. ok mpi@
2015-05-05emul_native is only used for kernel threads which can't dump core, soPhilip Guenther
delete coredump_trad(), uvm_coredump(), cpu_coredump(), struct md_coredump, and various #includes that are superfluous. This leaves compat_linux processes without a coredump callback. If that ability is desired, someone should update it to use coredump_elf32() and verify the results... ok kettenis@
2015-04-30Remove SIZE_MAX from limits.h. It was added years ago before weTodd C. Miller
had a proper stdint.h. No ports fallout. OK guenther@ miod@
2015-04-09Make the sparc64 pmap (more) mpsafe by protecting both the pmap itself and theMark Kettenis
pv lists with a mutex. Some minor code adjustments to prevent holding locks too long. This should make pmap_enter(9), pmap_remove(9) and pmap_page_protect(9) safe to use without holding the kernel lock.
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