Age | Commit message (Collapse) | Author |
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- provide proper dtoa locks
- use the real strtof implementation
- add strtold, __hdtoa, __hldtoa
- add %a/%A support
- don't lose precision in printf, don't round to double anymore
- implement extended-precision versions of libc functions: fpclassify,
isnan, isinf, signbit, isnormal, isfinite, now that the ieee.h is
fixed
- separate vax versions of strtof, and __hdtoa
- add complex math support. added functions: cacos, casin, catan,
ccos, csin, ctan, cacosh, casinh, catanh, ccosh, csinh, ctanh, cexp,
clog, cabs, cpow, csqrt, carg, cimag, conj, cproj, creal, cacosf,
casinf, catanf, ccosf, csinf, ctanf, cacoshf, casinhf, catanhf,
ccoshf, csinhf, ctanhf, cexpf, clogf, cabsf, cpowf, csqrtf, cargf,
cimagf, conjf, cprojf, crealf
- add fdim, fmax, fmin
- add log2. (adapted implementation e_log.c. could be more acruate
& faster, but it's good enough for now)
- remove wrappers & cruft in libm, supposed to work-around mistakes
in SVID, etc.; use ieee versions. fixes issues in python 2.6 for
djm@
- make _digittoint static
- proper definitions for i386, and amd64 in ieee.h
- sh, powerpc don't really have extended-precision
- add missing definitions for mips64 (quad), m{6,8}k (96-bit) float.h
for LDBL_*
- merge lead to frac for m{6,8}k, for gdtoa to work properly
- add FRAC*BITS & EXT_TO_ARRAY32 definitions in ieee.h, for hdtoa&ldtoa
to use
- add EXT_IMPLICIT_NBIT definition, which indicates implicit
normalization bit
- add regression tests for libc: fpclassify and printf
- arith.h & gd_qnan.h definitions
- update ieee.h: hppa doesn't have quad-precision, hppa64 does
- add missing prototypes to gdtoaimp
- on 64-bit platforms make sure gdtoa doesn't use a long when it
really wants an int
- etc., what i may have forgotten...
- bump libm major, due to removed&changed symbols
- no libc bump, since this is riding on djm's libc major crank from
a day ago
discussed with / requested by / testing theo, sthen@, djm@, jsg@,
merdely@, jsing@, tedu@, brad@, jakemsr@, and others.
looks good to millert@
parts of the diff ok kettenis@
this commit does not include:
- man page changes
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Suggestions and corrections by kettenis, ratchov, jakemsr. Thanks a lot!
Recording doesn't work at the moment.
ok kettenis ratchov
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ok kettenis@
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that delay(9) continues to do the right thing.
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UltraSPARC T2.
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ok miod@
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ok deraadt@
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tested by miod@, matthieu@, naddy@, jsg@, djm@
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and unused variables.
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problem where the clock would stop ticking on some CPUs because of lost
ticks.
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ok deraadt@
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on an attachment dependent flag; the Tadople SPARCLE needs it.
ok kettenis@ deraadt@
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in the MI code.
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a kernel 10-15% faster on the t1k. Don't do this for SMALL_KERNEL though,
otherwise the 4MB locked mapping for the data segment will be too small to
include a ramdisk.
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several minutes by making pmap_resident_count() return 0 for the kernel pmap.
discussed with miod@
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provided by the PROM gets flushed out of the TLB before we install our own
trap table. Makes RAMDISK kernels work on T2 systems.
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- math.h shouldn't define FLT_EVAL_METHOD, but float.h should (per
C99). remove from math.h, and add proper definitions in float.h
ok millert@
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SUN4V to let it suspend strands (why does everyone invent own words for
hyperthreads?). This gives a huge performance boost when most of the
cpus are idle.
kettenis@ ok
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per-processor soft interrupt register is used for hardware clock-tick
counter interrupts. So make smp_signotify() use IPL_SOFTINT instead
such that we don't unintentionally trigger a spurious clock interrupt.
This seems to fix the timekeeping anomalies on the t1k.
tested by art@
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ok marco@ no objection miod@ need this for regress djm@ no objection krw@
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Right now when mi_switch picks up the same proc, we didn't clear the
flag which would mean that every time we service an AST we would attempt
a context switch. For some architectures, amd64 being probably the
most extreme, that meant attempting to context switch for every
trap and interrupt.
Now we clear_resched explicitly after every context switch, even if it
didn't do anything. Which also allows us to remove some more code
in cpu_switchto (not done yet).
miod@ ok
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the PCI host bridge if we're not running on an UltraBook. Fix allocation of
bus number such that it works on machines that have OpenBoot 4.x.
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parameter and returns an aligned random load address for position
independent executables to use. This also adds three new vmparam.h
defines to specify the maximum address, minimum address and minimum
allowed alignment for uvm_map_pie() to use. The PIE address range
for i386 was carefully selected to work well within the i386 W^X
framework.
With much help and feedback from weingart@.
okay weingart@, miod@, kettenis@, drahn@
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For now, only one such flag is defined, PCKBC_CANT_TRANSLATE. It hints
pckbc that the device does not behave correctly to the ``set translation''
commands.
Set this flag if we are running on a Tadpole Ultrabook machine, which needs it.
This makes the built-in keyboard work correctly on this laptop (with the
help of the software translation pckbd diff).
tested & ok kettenis@
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that have it. Initial diff from art@.
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upcoming change.
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ok kettenis@
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ok art@
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MULTIPROCESSOR kernels. We map 'struct cpuinfo' at the same virtual
address on every processor, but since threads on the same core share
an MMU this doesn't quite work. With the hack we are at least able to
use the other core (and any additional processors).
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will be 0. Check SFSR too, before deciding there's no fault.
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