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2022-02-16Add mpfiic(4), a driver for the PolarFire SoC MSS I2C controller.Visa Hankala
OK kettenis@
2022-02-16change MD gosleep() and sleep_finish() to return int, the MI code will beTheo de Raadt
able to react to this suitably.
2022-02-16Make room for a cookie argument passed to audio_attach_mi(). CurrentlyAnton Lindqvist
unused but intended to be used to correlate audio and wskbd devices. ok ratchov@
2022-02-15Since acpitoshiba brightness button processing no longer plays gamesTheo de Raadt
with AML parsing outside the acpi thread, the locking-release dance around wsdisplay_{suspend,resume} can be removed ok kettenis
2022-02-15when the MI suspend code encounters problems, we need a way toTheo de Raadt
reset the MD state before bailing out. New MD function sleep_abort() does that.
2022-02-15MI disable_lid_wakeups() is not needed, x86 systems can do thisTheo de Raadt
in sleep_resume(), which seems sensible for other future systems also
2022-02-15fix mask in hppa inst_trap_return()Jonathan Gray
inst_trap_return() was checking for rfir by masking with 0xfc001fc0 which made it impossible to match rfir (0xca0) rfi: return from interruption 00 rv rv rv 60 0 6 5 5 3 8 5 rfir: return from interruption and restore 00 rv rv rv 65 0 6 5 5 3 8 5 from "PA-RISC 1.1 Architecture and Instruction Set Reference Manual" where rv indicates reserved bits change the mask to only mask out reserved bits and check for rfi in addition to rfir ok miod@
2022-02-14don't deref pointer before test it is safeJonathan Gray
ok miod@
2022-02-14Pass the entire compatible property for devices attaching to the iic(4) bus.Mark Kettenis
ok visa@
2022-02-14Delete incomplete implementation of bus_space_{alloc,free} in bus.h.Kenji Aoyama
This prevents errors on luna88k in src/usr.sbin/fw_update/pattern.c which includes dev/pci/pcivar.h, which includes machine/bus.h. Suggested by miod@
2022-02-14OF_getproplen() returns -1 on error, so don't store result in size_tJonathan Gray
ok kettenis@
2022-02-13remove stray tab whitespace. no code change.Mike Larkin
2022-02-13Fix return value check of OF_getproplen(). If "reset-gpios" is not foundTobias Heider
in the device tree -1 is returned, causing a panic in the following malloc call. ok kn@ patrick@ kettenis@
2022-02-13Move some MI pieces out of suspend_mp/resume_mpTheo de Raadt
ok kettenis
2022-02-13The Apple M1 SoC has two mechanism for doing IPIs. The first method usesMark Kettenis
the interrupt controller, the second method used implementation-specific CPU registers. The M1 Pro/Max SoCs use a modified interrupt controller that no longer provides the first method. So switch to the second method in preparation for adding M1 Pro/Max support to OpenBSD. As a bonus this mechanism seems to be faster (which may be why Apple calls these "fast" IPIs). ok patrick@
2022-02-13Some PCIe devices on the M1 and M1 Pro/Max need to be explicitly powered onMark Kettenis
(most notably the WiFi chip). This is done through a GPIO controlled by the SMC. Add support for this and make sure we wait for the 100ms required by the PCIe standard when we use that GPIO to turn on power. This makes sure these devices are available even if U-Boot doesn't turn them on for us. ok patrick@
2022-02-13Add basic GPIO support.Mark Kettenis
ok patrick@
2022-02-12wsdisplay checks are no longer needed hereTheo de Raadt
2022-02-12wsdisplay checks are no longer needed hereTheo de Raadt
2022-02-12add MP stubsTheo de Raadt
2022-02-12for non-SUSPEND kernel, put the ioctl pieces entirely inside #ifdefTheo de Raadt
2022-02-11the sleep_clocks() hook is not needed because the architectures whichTheo de Raadt
need to do this can do it a few moments later in a different hook
2022-02-11sleep_cpu/resume_cpu are part of an earlier MI split attemptTheo de Raadt
noticed by kettenis
2022-02-10Duplicate "park disk" code, so that the SUSPEND case can be MI, it is onlyTheo de Raadt
HIBERNATE that needs to be in MD code. ok gkoehler
2022-02-10#ifdef the SUSPEND ioctl blockTheo de Raadt
2022-02-10Add stubs for macppc suspendGeorge Koehler
These stubs don't work; they only pretend to suspend the machine. SUSPEND + MULTIPROCESSOR doesn't build. zzz(8) stops giving an error message, even in no-SUSPEND kernels. Add intr_enable in <powerpc/cpu.h>, adapted from powerpc64, because subr_suspend.c calls intr_enable().
2022-02-09this is now in apm.cTheo de Raadt
2022-02-09not ready for suspendTheo de Raadt
2022-02-09*** empty log message ***Theo de Raadt
2022-02-09Move x86-only stubs used by kern/subr_suspend.c into dev/acpi/acpi_x86.cTheo de Raadt
for sharing between i386 and amd64. ok mlarkin kettenis
2022-02-09Increase armv7 ramdisk size to avoid errors in installer.Visa Hankala
OK deraadt@
2022-02-08oops, a typo snuck inTheo de Raadt
2022-02-08The suspend/resume code is a sticky mess of MI, MD, and ACPI sequencing.Theo de Raadt
This splits out the MI sequencing, backing it with per-architecture helper functions. Further steps will be neccesary because ACPI and MD are too tightly coupled, but soon we'll be able to use this code for more architectures (which depends on figuring out the lowest-level cpu sleeping method) ok kettenis
2022-02-07Allow writes to rw pages in pte_spill_vGeorge Koehler
In the powerpc pmap, hash collisions can spill page table entries. Page faults can use pte_spill_v to reinsert a spilled pte. If the fault is a write (DSISR_STORE), then pte_spill_v tries to check for a read-only page. The existing check (pte_lo & PTE_RO_64) also matched rw pages, because PTE_RO_64 is 3 and PTE_RW_64 is 2. This caused pte_spill_v to deny writes to rw pages. Then uvm_fault might allow the write; but uvm_fault can't handle some pages in the kernel. Such faults caused, "panic: uvm_fault: fault on non-pageable map", or "panic: trap type 300". Change it to ((pte_lo & PTE_PP_64) == PTE_RO_64). This seems to fix one reason why bsd.mp on a macppc dual G5 might panic. ok kettenis@ miod@
2022-02-07Allow "ddb{1}> trace" through interrupt on macppcGeorge Koehler
If cpu0 sends PPC_IPI_DDB to cpu1, then cpu1 stops on its interrupt stack. Teach ININTSTK to allow traces through all interrupt stacks, not only cpu0's. ININTSTK now works by looping for all cpus. It doesn't remember which cpu owns the stack. A macppc has at most 4 cpus. ok kettenis@ miod@
2022-02-06Avoid touching "locked" DARTs. While there, print something when we placeMark Kettenis
a DART in bypass mode. ok patrick@
2022-02-05grow the dmesg buffer on i386 from 4 to 8 pagesDaniel Dickman
I have a machine where the dmesg is too big for 4 pages. ok deraadt@
2022-02-05Switch vmapbuf() and vunmapbuf() over to km_alloc(9) and km_free(9) likeMark Kettenis
we did for arm64 and powerpc64 some time ago. ok guenther@
2022-02-04Define __HAVE_PMAP_MPSAFE_ENTER_COW; the ARMv8 architecture requiresMark Kettenis
that we implement proper "break-before-make" semantics and I've stared at the code for long enough that I've convinced myself that we do indeed implement this correctly several times. ok guenther@
2022-02-03sync list of amdgpu files built with -msse -msse2 with linux 5.15.yJonathan Gray
2022-02-02Add apldma(4), a driver for the DMA controller found on Apple SoCs.Mark Kettenis
This driver implements an interface for using DMA for audio output. ok ratchov@
2022-02-02Get the pci bus number from the bus-range property when available, ratherMiod Vallat
than assuming it will always be zero. ok kettenis@
2022-02-01An old hack skips use of memory regions < 1MB size, because some machinesTheo de Raadt
put BIOS objects into there, and rely upon them. We are shocked, SHOCKED, to find a machine that does so in a large object (Supermicro 5019D-FTN4). So now we need to ignore memory regions < 32MB in size. If we put this memory into use, the zerothread will soon clear it, and on this particular case the machine resets because something in AML or SMI gets unhappy. Other machines with similar problems may exhibit other misbehaviours, so this could fix heisenbugs. Sadly I expect products to get worse. ok kettenis, miod
2022-02-01Make sure we always pass a page-aligned address to pmap_grow_map().Mark Kettenis
Fixes an issue uncovered by the recent change to enlarge kva space where an unaligned address was passed resulting in memset() writing past the end of the newly allocated page. ok miod@
2022-02-01When a struct ipovly needs to be computed and checksummed in in4_cksum(),Miod Vallat
do not bother operating on its first 8 bytes, which will always be zero. ok visa@
2022-02-01Attempt to guarantee that on copy-on-write faulting, the new copyPhilip Guenther
can't be written to while any thread can see the original version of the page via a not-yet-flushed stale TLB entry: pmaps can indicate they do this correctly by defining __HAVE_PMAP_MPSAFE_ENTER_COW; uvm will force the initial CoW fault to be read-only otherwise. Set that on amd64 and fix the problem case in pmap_enter() by putting a read-only mapping in place, shooting the TLB entry, then fixing it to the final read-write entry so this thread can continue without re-faulting. reported by jsing@ from https://github.com/golang/go/issues/34988 assisted by discussion in https://reviews.freebsd.org/D14347 tweaks from jsing@ and kettenis@ ok jsing@ mpi@ kettenis@
2022-01-30Add aplnco(4), a driver for the Numerically-controlled oscillator (NCO)Mark Kettenis
clock that drives the audio clocks on Apple silicon. ok patrick@
2022-01-29Put the leaf and subleaf input values (from rax/rcx) into local variables,Philip Guenther
truncating them to 32bit as documented by the SDM and verified on an Intel CPU in a Lenovo T510. Use that in the clamping logic and all the tests, adjusting DPRINTF() format strings to match. ok mlarkin@
2022-01-28Give ddb more access to registers on macppc, powerpc64George Koehler
Edit db_regs[] in db_trace.c on both powerpc and powerpc64, so ddb can access $r14, $r15, $r16, $dar, $dsisr. Only for powerpc: change db_trap_glue to copy all registers to and from ddb_regs (it was skipping some); change db_set_single_step and db_clear_single_step to flip the correct bit of srr1; delete FIXUP_PC_AFTER_BREAK, which was off by 1 instruction. "ddb{1}> s" on my PowerMac7,3 (dual G5 at 2700 MHz) began to panic like, "*cpu0: mutex 0xa7d0a0 not held in tc_update_timekeep". Add an arbitrary delay(100) after sending PPC_IPI_DDB; I want cpu0 to get the ipi before it can see db_active == 1 and skip acquiring a mutex. ok kettenis@
2022-01-28Remove unused guarded read and write routines.Visa Hankala
No objection from miod@
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-18 03:37:03 +0000