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2020-01-21remove a few disabled drivers that don't compile and seem unlikely toTed Unangst
become interesting in the future. ok deraadt krw
2020-01-20floppy is a bit tight right now, evict fxp temporarily until anotherTheo de Raadt
space-saving candidate is found (this candidate selected by jsg and kettenis, don't blame the commiter)
2020-01-20remove esp at pcmcia attachment. it doesn't even compile.Ted Unangst
ok deraadt krw
2020-01-20Separate the stack trace saving interface from ddb. The saving does notVisa Hankala
require the debugger on most architectures, and the separation makes the code easier to use from other subsystems. The function definitions are still conditional to DDB. However, that should not matter for now. OK deraadt@, mpi@
2020-01-16Convert to tsleep_nsec(9).Martin Pieuchot
Tested by kn@, ok kettenis@, kn@
2020-01-14Add amlsm(4), a driver for the "secure monitor" firmware interface.Mark Kettenis
For now, this driver fetches the "chip id" and feeds this as entropy to the kernel's random subsystem.
2020-01-14Add amltemp(4), a driver for the temperature sensors on various Amlogic SoCs.Mark Kettenis
2020-01-13Convert to tsleep_nsec(9), while here fix a bug where the value specifiedMartin Pieuchot
in ticks was meant to be in msecs. Pointed out by and ok patrick@
2020-01-13Timeouts are all specified in multiple of `hz' so define them in term ofMartin Pieuchot
seconds and use tsleep_nsec(9). ok patrick@
2020-01-13Kill dead code.Martin Pieuchot
ok patrick@
2020-01-13Add the capability to boot from another block device than the one thatMark Kettenis
efiboot was loaded from. Code taken from arm64 with softraid support dropped for now. ok jsg@
2020-01-12Implement cpu_kick() and cpu_unidle().Mark Kettenis
2020-01-11fix dup #includeTheo de Raadt
from alex naumov
2020-01-10timeout_add(9) -> timeout_add_sec(9)Jonathan Gray
ok cheloha@
2020-01-10xlights(4): timeout_add(9) -> timeout_add_msec(9)cheloha
There are no units noted here, but macppc is a 100hz platform so it's safe to just assume 2500 milliseconds here. ok jsg@
2020-01-09If the kernel panics due to SMEP or SMAP, print correct stack traceAlexander Bluhm
and pass information to ddb. This helps to debug kernel NULL pointer function calls. input guenther@; OK kettenis@
2020-01-06Remove redundant BPIALL instructions (since ICIALLU already invalidates theMark Kettenis
BP cache if necessary). ok patrick@
2020-01-06Rewrite the armv7 context switch code. The new code is much closer to theMark Kettenis
arm64 version and fixes some (but not all) remaining issues with SMP support on armv7. ok visa@, patrick@
2020-01-06Print a few more registers when we hit a uvm_fault in the kernel.Mark Kettenis
2020-01-05consistently uppercase pci product definesJonathan Gray
ok mpi@
2020-01-04Update comment on port WWN checkkn
No object change; I forgot to commit this together with sys/dev/pci/mpii.c revision 1.125 date: 2020/01/03 08:39:31; author: kn; state: Exp; lines: +10 -1; Fix RAID volume WWIDs for LSI controllers on sparc64 Some controllers generate 128 bit WWIDs for RAID volumes but only has a bit field to report it to the host, so it only puts the vendor-specified part here (last half of ID string printed when sd* attaches matches sl->port_wwn in reverse). As such IDs are not IEEE NAA compliant, OpenBoot PROM -at least on SPARC- sets the highest nibble to three by convention to mark such volumes as RAID volumes so that the OS (Solaris) may identify it as such. This is the last missing piece to make booting off hardware RAID on sparc64 just work; autoconf(9) is now able to match the port WWN against the bootpath to eventually identify the volume as the root device. Feedback jmatthew deraadt OK jmatthew
2020-01-04Remove BOOT_FLAGS and simplify the boot blocks logic.Mark Kettenis
From miod@
2020-01-04Ignore 'hardware lied' interrupt in do-while loop, same as firstKenji Aoyama
time processing. That was sometimes observed when the system get heavy load, like 'make -j N build'.
2020-01-04remove AMD64 strings from pcidevsJonathan Gray
ok mortimer@ mpi@ deraadt@
2020-01-02Use newabi register names in disassembly.Visa Hankala
OK miod@
2020-01-01Unbreak DEBUG build: use %x not %lx with intkn
2020-01-01Unbreak DEBUG build: do not use undefined pakn
introduced iommu_dvmamap_insert() using an undefined paddr_t pa under DEBUG; since it cannot be introduced it (easily), remove it from the printf().
2020-01-01Unbreak DEBUG build: Format bus_{addr,size}_t as longkn
2020-01-01Unbreak DEBUG build: format time_t as long longkn
Feedback guenther
2019-12-31Use C99 designated initializers with struct filterops. In addition,Visa Hankala
make the structs const so that the data are put in .rodata. OK mpi@, deraadt@, anton@, bluhm@
2019-12-31Use km_alloc(9) instead of uvm_km_zalloc().Martin Pieuchot
Tested by and ok aoyama@
2019-12-30Add ne(4) support on cbus(4).Kenji Aoyama
Allied Telesis CentreCOM LA-98 works well, other NE2000 based boards may also work with correct resource specifying. This driver was developed for demonstration at Open Source Conference 2019 Nagoya, Japan, in July, but I forgot to commit after that:-)
2019-12-26In ACPI mode, do not generate "cpu" nodes for CPUs that are disabled.Mark Kettenis
Fixes booting on ACPI machines where the MADT table lists CPUs that are disabled such as the od1000 with new EDK2 firmware.
2019-12-25WSDISPLAYIO_GTYPE is u_int not intJonathan Gray
2019-12-23Machines with many CPUs and long feature lists fill up the dmesg(8)Alexander Bluhm
during kernel startup before syslogd(8) can receive it. Increase message buffer size from 94k to 128k on amd64. reported by Hrvoje Popovski; OK deraadt@
2019-12-23The boot loader allows to inspect memory with the hexdump command.Alexander Bluhm
Document the new feature in boot(8) man page. OK jmc@ deraadt@
2019-12-23Add amdgpio(4), a driver for the GPIO controller found on newer AMDMark Kettenis
AMD SoCs/chipsets. From James Hastings
2019-12-22Wire up ipmi(4).Mark Kettenis
ok deraadt@
2019-12-20Convert various boolean_t/TRUE/FALSE to int/1/0 in mips64 memory code.Visa Hankala
OK mpi@
2019-12-20Replace a lonely TRUE.Visa Hankala
OK mpi@
2019-12-20Convert boolean_t/TRUE/FALSE to int/1/0 in mips64 pmap.Visa Hankala
Rename variables for clarity while here. OK mpi@
2019-12-20Fix build.Visa Hankala
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.Jonathan Gray
Even with the latest microcode this is not set on all CPUs with TSX, but is set on CPUs which don't need MDS mitigations. MDS mitigations also mitigate TSX Asynchronous Abort (TAA) but aren't done if the CPU claims to not be affected by MDS (MDS_NO). According to "Deep Dive: Intel Transactional Synchronization Extensions (Intel TSX) Asynchronous Abort" CPUs requiring additional mitigations for this are: 06-8e-0c Whiskey Lake (ULT refresh) 06-55-0{6,7} 2nd Gen Xeon Scalable Processors based on Cascade Lake 06-9e-0d Coffee Lake R Currently TSX is disabled unconditionally when possible even if TAA_NO is set. We don't currently do MDS mitigations on i386. Attempt to disable TSX regardless to match amd64.
2019-12-20Disable TSX when MSR_ARCH_CAPABILITIES sets TSX_CTRL.Jonathan Gray
Even with the latest microcode this is not set on all CPUs with TSX, but is set on CPUs which don't need MDS mitigations. MDS mitigations also mitigate TSX Asynchronous Abort (TAA) but aren't done if the CPU claims to not be affected by MDS (MDS_NO). According to "Deep Dive: Intel Transactional Synchronization Extensions (Intel TSX) Asynchronous Abort" CPUs requiring additional mitigations for this are: 06-8e-0c Whiskey Lake (ULT refresh) 06-55-0{6,7} 2nd Gen Xeon Scalable Processors based on Cascade Lake 06-9e-0d Coffee Lake R Currently TSX is disabled unconditionally when possible even if TAA_NO is set. ok bluhm@ guenther@ deraadt@ tested by bluhm@ on i5-8365U (06-8e-0c).
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok patrick@
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok mlarkin@, visa@
2019-12-19Convert boolean_t/TRUE/FALSE to int/1/0 for coherency with the rest ofMartin Pieuchot
the kernel. ok mlarkin@, visa@
2019-12-19poll handlers must return a poll(2) revents value, not errno(2) values.Reyk Floeter
Some drivers have returned ENXIO (6) if the device is not available which incorrectly translates into POLLPRI|POLLOUT (2|4) in userland. Change it to POLLERR for now, but it might as well be POLLHUP. OK mpi@
2019-12-18typoTheo de Raadt
2019-12-17arm64 cpus speculatively execute instructions after ERET, and on someTheo de Raadt
processors not all microarchitectural side effects are abandoned, leading to spectre-like effects. This was fixed quietly and without responsible disclosure by ARM in linux mainline a year ago, but rediscovered independently by Anthony Steinhauser. ok patrick guenther kettenis comment to ARM: "Responsible Disclosure" doesn't mean "downplay at maximum to avoid damage to the bottom line", the responsibility aspect entails ensuring "all customers are aware of the defect". What happened here is indistinguishable from Intel's behaviour, and that's not the look you want.
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