| Age | Commit message (Expand) | Author |
|---|
| 2009-04-19 | Mutexes for arm and sh softinterrupts. | Owain Ainsworth |
| 2009-04-19 | On Octane, force a nonzero _dma_mask value so that we do not risk trying to | Miod Vallat |
| 2009-04-19 | Attach the 1-Wire devices early, and pick our partnumber; based on this | Miod Vallat |
| 2009-04-19 | Correctly handle bus_dma_tag with _dma_mask == 0. | Miod Vallat |
| 2009-04-19 | Parse and display the part number and the serial number, instead of falsely | Miod Vallat |
| 2009-04-19 | Count number of cpus found (potentially not attached) and store that | Theo de Raadt |
| 2009-04-19 | Rename max_cpus to ncpusfound and compute it regardless of option | Miod Vallat |
| 2009-04-19 | Count number of cpus found (potentially not attached) and store that | Theo de Raadt |
| 2009-04-19 | Switch the softinterrupt code on x86 over to mutexes instead of | Owain Ainsworth |
| 2009-04-19 | Use correct device index for Ethernet interrupt handler. | Joel Sing |
| 2009-04-19 | Fix interrupt mapping for devices behind PCI-PCI bridges. | Mark Kettenis |
| 2009-04-19 | Add heuristics to tell IP27 and IP35 apart, as they will need to be handled | Miod Vallat |
| 2009-04-19 | A much more reliable logic to find out the second interrupt of the ioc boards. | Miod Vallat |
| 2009-04-18 | Attach to IP35 Xbridge too. | Miod Vallat |
| 2009-04-18 | Attach pci busses with pba_bus being zero, and not our bridge unit number, | Miod Vallat |
| 2009-04-18 | Fewer hardcoded values and simpler code in ip30 interrupt handling. | Miod Vallat |
| 2009-04-18 | Simplify ethernet interrupt dispatching, since it is not shared with anything | Miod Vallat |
| 2009-04-17 | Catch up with uvm_pglistalloc() interface change. | Mark Kettenis |
| 2009-04-15 | The current iommu code only touches the hardware if the bios did not | Owain Ainsworth |
| 2009-04-15 | Disable DEBUG now, it floods too much information. | Miod Vallat |
| 2009-04-15 | A firsh shot at IP27 interrupts; currently the code assumes it runs on | Miod Vallat |
| 2009-04-15 | Change the way the widget interrupt register is computed and have it become | Miod Vallat |
| 2009-04-15 | Oops, referenced an include file which I don't plan to commit yet. | Miod Vallat |
| 2009-04-15 | Only enable the passthrough interrupt for serial ports, and let com(4) manage. | Miod Vallat |
| 2009-04-15 | Remove en(4) (no manpage present, no none removed), and the midway.c glue code | Owain Ainsworth |
| 2009-04-15 | fix properly; size gets decremented while we check the segments, so save it so | Owain Ainsworth |
| 2009-04-15 | make load_raw do the same as the others and set mapsize and nsegs to | Owain Ainsworth |
| 2009-04-15 | bus_dmamap_load_raw didn't set map->dm_mapsize on successful load. | Owain Ainsworth |
| 2009-04-14 | Convert the waitok field of uvm_pglistalloc to "flags", more will be added soon. | Owain Ainsworth |
| 2009-04-14 | enable ix(4). | Jonathan Gray |
| 2009-04-13 | Ignore zero-sized regions from the BIOS memory map when reserving root PCI | Mark Kettenis |
| 2009-04-13 | The start of Origin 200 support. Based on some code contributed by pefo@ | Miod Vallat |
| 2009-04-13 | Also match on Uniqueware family 0x91, and correctly report the third byte | Miod Vallat |
| 2009-04-13 | Add missing option BOOT_CONFIG | Miod Vallat |
| 2009-04-13 | Remove commented out debug options. | Miod Vallat |
| 2009-04-13 | Explicitly test whether the SUNW,start-cpu-by-cpuid interface is available | Mark Kettenis |
| 2009-04-12 | Implement /dev/mdesc, a device to read the machine description on sun4v | Mark Kettenis |
| 2009-04-12 | Interrupt support for IOC3 and its subdevices (currently limited to the | Miod Vallat |
| 2009-04-12 | Add code to prevent the MI pci code to cause IOC3 devices to freeze and | Miod Vallat |
| 2009-04-12 | Needs <machine/atomic.h> to compile. | Miod Vallat |
| 2009-04-12 | Get com console global variables from <dev/ic/comvar.h> instead of declaring | Miod Vallat |
| 2009-04-12 | Better constraints on the temporary register in atomic_{set,clear}bits_int. | Miod Vallat |
| 2009-04-12 | need nvram to link; ok miod | Theo de Raadt |
| 2009-04-12 | Move code handling Machine Descriptions out of the cbus(4) driver. | Mark Kettenis |
| 2009-04-11 | Create extents for resource accounting on the root PCI bus and populate them | Mark Kettenis |
| 2009-04-11 | There is no support for building multi-socket machines in AMD Family 11h | Mark Kettenis |
| 2009-04-10 | Catch up with sparc changes (bcopy fix, struct cpuinfo, etc); still dies early | Miod Vallat |
| 2009-04-10 | Don't blindly dereference a NULL pointer when the boot device is not known. | Miod Vallat |
| 2009-04-10 | Use soft interrupts to dispatch pcmcia device interrupts; this ensures the | Miod Vallat |
| 2009-04-10 | generic soft interrupts support for sparc. Soft interrupt handlers are now | Miod Vallat |
