summaryrefslogtreecommitdiff
path: root/sys/arch
AgeCommit message (Collapse)Author
2018-03-31Add CVS Ids.Patrick Wildt
2018-03-31Bump version number so that we can see if efiboot(8) supports EFI's SimplePatrick Wildt
Network protocol or not.
2018-03-31In addition to using EFI's PXE protocol implement a network driver thatPatrick Wildt
makes use of EFI's Simple Network protocol. This allows us to speak raw network on U-Boot based machines so we can do TFTP boot on those as well. ok kettenis@
2018-03-31Enable mvtemp(4).Mark Kettenis
2018-03-31Fix a hang on i386 vmware guest that was happening on copyout() ofAlexander Bluhm
arguments for /sbin/init. For CPU 0 identifycpu() originally got called twice, once very early from cpu_startup(), then again from cpu_attach(). Now we call identifycpu() only from cpu_attach() with CPUF_PRIMARY set. So make sure, that for CPU 0 nothing is skipped. Otherwise, cpu_info might have different features set for CPU 0 than for all other CPUs. This is similar to what amd64 does. from hshoexer@; reported and fix tested by Emilio Perea; OK mlarkin@
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.Alexander Bluhm
Switching from per PCB TSS to per CPU TSS broke kvm86 calls to the BIOS. This change fixes the issues. from hshoexer@; reported and tested by semarie@; OK deraadt@
2018-03-31Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.Alexander Bluhm
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc. The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS. from hshoexer@; OK deraadt@
2018-03-31r1.7 of xhci_fdt.c pulls in the regulator API.Visa Hankala
Add ofw_regulator.c and its dependencies to fix build.
2018-03-30Enable imxanatop(4).Patrick Wildt
2018-03-30Move imxanatop(4) to sys/dev/fdt.Patrick Wildt
2018-03-30No need to include armv7var.h.Patrick Wildt
2018-03-30No need to include armv7var.h and imxccmvar.h.Patrick Wildt
2018-03-30Remove unused PCIe code from imxiomuxc(4). I'm sure we can do thisPatrick Wildt
better now with the FDT framework when we actually tackle PCIe.
2018-03-30Enable imxiic(4).Patrick Wildt
2018-03-30Move imxiic(4) to sys/dev/fdt.Patrick Wildt
2018-03-30Enable imxesdhc(4).Patrick Wildt
2018-03-30Move imxesdhc(4) to sys/dev/fdt.Patrick Wildt
2018-03-30Enable imxgpio(4).Patrick Wildt
2018-03-30Move imxgpio(4) to sys/dev/fdt so it can be shared between arm64 and armv7.Patrick Wildt
2018-03-30Replace MD disable/restore interrupt in the establish and disestablishPatrick Wildt
code in imxgpio(4) with splhigh() and splx() which is MI and should be good enough for the job. Discussed with kettenis@
2018-03-30Cut down imxgpio(4) with a big axe. There were plenty of pieces thatPatrick Wildt
were not needed anymore since we switched to the FDT-based GPIO code.
2018-03-30Remove a premature newline print. A later print already does it andPatrick Wildt
thus creates an erroneous line break.
2018-03-30Enable imxgpc(4).Patrick Wildt
2018-03-30Move imxgpc(4) to sys/dev/fdt so it can be shared between arm64 and armv7.Patrick Wildt
ok kettenis@
2018-03-29Call imxuart(4) early attach on arm64.Patrick Wildt
2018-03-29Move imxuart(4) to sys/dev/fdt so it can be shared between arm64 and armv7.Patrick Wildt
Discussed with kettenis@
2018-03-29Initialize the secondary core's schedstate before spinning them up.Patrick Wildt
ok kettenis@
2018-03-29Set p->p_cpu in cpu_switchto() like we do on other MP architectures.Patrick Wildt
ok kettenis@
2018-03-29Enable mvclock(4), mvicu(4), mvpinctrl(4), mvgpio(4) and mvrtc(4). ThisMark Kettenis
brings us very basic support for the SolidRun MACCHIATOBin.
2018-03-29Make sparc64 ofwboot open the softraid boot chunk early on and keep theStefan Sperling
handle open until a kernel has been loaded from the softraid volume. This works around an apparent memory leak in the firmware on T5220 which fails to load an ldom guest kernel from softraid with a "Fast Data Access MMU Miss" trap after many OF_open()/OF_close() calls. This problem goes away when we call OF_open()/OF_close() just once instead of for every block we want to read. Crank ofwboot version to 1.10. Make sure to keep working boot media around before upgrading! Softraid boot of an T5220 ldom guest (CRYPTO), and a v240 (RAID 1), have been tested and are known to work. Please report issues to bugs@. ok kettenis@
2018-03-29Remove RDTSCP from the CPUID flags reported to the guest VM. The instructionMike Larkin
was already disabled, but reporting it as available and then failing it caused SmartOS to crash during boot. ok pd@
2018-03-29Explicitly declare the gdt storage in struct cpu_info_full instead ofPhilip Guenther
implicitly putting it in the padding to page-size. This eliminates a couple Coverity issues from the Meltdown work. testing daniel@ ok mlarkin@
2018-03-27Add acpicmos(4), a driver that implements SystemCMOS OperationRegionMark Kettenis
access support. This fixes machines where the AML doesn't check whether support for this OperationRegion type has been registered by the OS. ok mlarkin@
2018-03-24Fix intr_restore() on luna88k to restore the previously saved stateVisa Hankala
rather than enable interrupts unconditionally. Tested by and OK aoyama@; no objection deraadt@
2018-03-22iBackout the preparations for fixing Meltdown on i386. The task wasAlexander Bluhm
only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
2018-03-22In vldcp(4), initialize lc_rx_state to a magic value which is notStefan Sperling
used by the hypervisor interface. This allows the driver to sync up with the firmware's Rx channel state (DOWN/UP/RESET) upon the first interrupt, and repair inconsistent Rx channel head/tail queue state if necessary. Unwedges another interrupt storm observed when starting ldomd on my T5220 after a reboot. In case the firmware's Rx queue head and tail are initially not equal, the normal interrupt handling path will not operate as expected due to the interrupt storm, and we never told the firmware to shut up. Other cbus(4) drivers might benefit from a similar fix, but we're too close to release for experiments, so I'm just fixing vldcp(4). ok kettenis@ deraadt@
2018-03-21When installing a shared interrupt handler, copy the ih_bus and ih_cpuMark Kettenis
members of the interrupt handler struct. Fixes a panic on sun4v systems with shared interrupts. tested by stsp@
2018-03-20Make use of the new common bus space tag in imxuart(4) so it does notPatrick Wildt
need to source armv7 headers and can be used on arm64 as well. Also don't hardcode com(4)'s major number. ok kettenis@
2018-03-20To allow sharing more code between armv7 and arm64 platforms, introducePatrick Wildt
a common bus space tag that can be used for early console attachment. ok kettenis@
2018-03-20Switching from per PCB TSS to per CPU TSS broke kvm86 calls to the BIOS.Alexander Bluhm
This change fixes the issues. from hshoexer@; reported and tested by semarie@; OK deraadt@
2018-03-20Do not panic from ddb(4) when a lock requirement isn't fulfilled.Martin Pieuchot
Extend the logic already present for panic() to any DDB-related operation such that if ddb(4) is entered because of a fault or other trap it is still possible to call 'boot reboot'. While here stop printing splassert() messages as well, to not fill the buffer. ok visa@, deraadt@
2018-03-20Add hibernate IO path for sdmmc(4). This requires some help from theJonathan Matthew
sdmmc chipset driver, currently only implemented in sdhc(4), but mostly uses the regular path. sdhc(4) also needed the ability to perform IO while cold. ok deraadt@
2018-03-18vmm(4): handle invalid cpuid request (%eax too large) according to the SDMMike Larkin
instead of just returning 0s. Initial diff from Adam Steen, thanks! ok pd@
2018-03-16Make FPU registers available in core dumps and through ptrace(2).Mark Kettenis
ok visa@, patrick@
2018-03-14On newer machines IPMI attaches only using the ACPI tables instead ofPatrick Wildt
the SMBIOS table. Some machines even have IPMI defined in both tables. This attachment driver makes ipmi(4) available via ACPI. There can only attach one ipmi(4) device, either on ACPI or SMBIOS. Akin to the SMBIOS-attached ipmi(4) this driver is disabled by default. Feedback from jsg@ ok deraadt@
2018-03-13Preparation for i386 Meltdown fix:Alexander Bluhm
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc. The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS. from hshoexer@; OK deraadt@
2018-03-13pmap_map_ptes() always returns the same ptep and pdepp pointers,Philip Guenther
so inline the assignments, pushing them through the callers into several other functions. This shows that pmap_free_ptp() was doing a duplicate set of pmap_tlb_shootpage() calls: delete the extras. ok deraadt@ mlarkin@
2018-03-13We don't save+restore FS.base and GS.base on every context switch butPhilip Guenther
rather reset GS.base and restore FS.base to what was set via __tcb_set(), so we can't really support the wr{fs,gs}base instructions by userspace. Enabling CR4_FSGSBASE is therefore incorrect so stop doing so. ok jsg@ krw@
2018-03-12Remove dependencies for non-existing files.Mark Kettenis
From Artturi Alm.
2018-03-12Add voltage regulator support.Mark Kettenis
ok jsg@