Age | Commit message (Collapse) | Author |
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supposed to be outside the clipping region, not inside (i.e. there was an
off-by-one everywhere).
- Add colormap support, by programming the RAMDAC palette registers at init
time, and also implement the colormap ioctls.
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this hardware alive is becoming increasingly difficult, and I should heed the
message sent by the three disks which have died on me over the last few days.
Noone sane will mourn these ports anyway. So long, and thanks for the fish.
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we block all interrupts that can grab the kernel lock. The simplest way to
achieve this is to make sure mutexes always raise the ipl to the highest
level that has interrupts that grab the kernel lock. This will allow us
to have "mpsafe" interrupt handlers at lower priority levels.
No change for non-MULTIPROCESSOR kernels.
ok miod@
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ok miod@
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Not due to testing... but because they can't fit side by side.
ok kettenis
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ok syl@, bmercer@, jasper@
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inspired by rapha@
ok rapha@, jasper@
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At this moment upd(4) exposes data from usb-based uninterruptable power systems
(or just USB Power Devices), sysctl(8) sensors (read snmpd(8) friendly), it is
also an "in-base" alternative to other 3rdparty UPS-monitoring software, we
have plans to bring more features.
This is my first "something" into the tree. Lots of thanks:
sthen@ and blambert@ are the ones to blame for the idea/challenge.
mpi@ is the one whom pushed me to get it correct (from uhub -> uhidev).
reyk@ mentored me on OpenBSD-way with previous iked/relayd experiences.
ok mpi@, deraadt@ "get it in".
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native size, so eliminate the #defines.
ok miod@
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the address of the alt L1 PTE, etc.
Remove extern declaration of pdes, as it doesn't exist as a global.
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speed and remove the no-op cases added to avoid the warning.
We shouldn't normally hit the warning anyway, the bus speed is only
used on older i386 machines with piixpcib/ichpcib based speedstep or
to create a fake high/low table with newer style speedstep when we
can't get the table from ACPI.
ok kettenis@
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ok kettenis@
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used by any of the remaining xenocara drivers. Except perhaps for the
legacy i810 support in the xf86-video-intel driver. But i810 support has
almost certainly been broken for more than a year now, and any remaining
users are probably better off using the xf86-video-vesa driver ever since
XAA support was removed from the X server.
ok deraadt@, jsg@, mpi@
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on sgi.
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archs have instrutions that can do this, and the rest that dont get
to use wrappers around the byteswap(3) api.
this provides MI backends for sparc64 and powerpc which get a big
benefit from this because byteswapping in registers is really hard
for them.
the intended use case is for reading and writing bits of dma memory
handed to and from hardware.
discussed with miod@ guenther@ deraadt@
ok miod@ kettenis@
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fairer access to the kernel lock between logical cpus, especially
in multi socket systems.
i first wrote this diff in 2011.
ok n2k14 for post 5.5 (deraadt@ and kettenis@ in particular)
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fairer access to the kernel lock between logical cpus, especially
in multi socket systems.
i first wrote this diff in 2011. it provided the model for the i386
and sparc64 ticket locks.
ok n2k14 for post 5.5 (deraadt@ and kettenis@ in particular)
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fairer access to the kernel lock (which suffers very heavy contention
at the moment).
i wrote this at n2k14 and reworked it shortly after to use the mi
atomic ops api when that was agreed on. ive been running it on my
systems ever since.
the version before the atomic op tweaks was tested by kettenis@
n2k14 (deraadt@ and kettenis@ in particular if i recall correctly)
oked this going in after 5.5
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tweaks jmc@
OK krw@, gilles@, lteo@, tedu@, todd@, benno@, sthen@
"The time is right." and much help getting the show on the
road deraadt@
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"mainbus" device. this breaks when mpath is enabled because it
attaches before mainbus and therefore takes the head position.
have autoconf provide device_mainbus() which looks up mainbus_cd,
and use that instead.
discussed with deraadt who just wants mpath stuff to move forward
despite there being many ways to shine this particular turd.
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Also add new cn30xxcorereg.h to provide constant variables of octeon
core.
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optimizations really become as evil as some people claim, or some poor
soul tries to optimize things by inlining this function.
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did, but less awkward). Also make sure that the code changing the K0SEG CCA
value has enough nops, before returning to cached space, to match the
recommended procedure in the RM52xx and RM7000 erratas.
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namespace, so stop changing behavior when it's #defined
ok beck@ krw@
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went anywhere.
ok miod@
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for many newer instructions.
With feedback from jsg@
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BUS_DMA_NOCACHE (or BUS_DMA_COHERENT if the platform does not have coherent
caches) will use PMAP_NOCACHE when invoking pmap_enter(), to avoid creating
cached mappings, and then evicting them from the cache.
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page, the pte is created uncached.
Make sure pmap_enter_pv() honours the cache bits of the pte, instead of
assuming it will only get called for cached pages. Have it set PV_UNCACHED
in the pv flags for the page, if this is the first use of this page and the
mapping is not cached. Only check for a virtual aliasing cache condition if
the new mapping is cached.
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- remove unneeded comment, kern.netlivelock doesn't get set here.
- rework octeon_eth_mediainit() to be more like other drivers and
remove a bunch of XXXs in the process.
testing and ok yasuoka@
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definition and the C part of the resume code was using the second. This
manifested itself as mysterious reboot and stack corruption problems on
resume.
ok deraadt@
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size, the number of sets, and the total size (and the set size, for convenience)
per cache (I$, D$, L2, L3).
This allows cpu.c to print the number of ways (sets) of L2 and L3 caches from
the cache information, rather than hardcoding this from the processor type.
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unnecessary
ok krw@ kettenis@
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ok deraadt@
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Remove APERTURE, DDB_SAFE_CONSOLE and *_DEBUG from RAMDISK-* kernels.
Add option USBVERBOSE to all kernels.
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from being bzeroed when locore bzeros what it thinks is the bss.
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Bump version.
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