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2012-10-08Avoid accessing .data or .bss from real mode, since they may not be withinJoel Sing
the current segment. Load and store the necessary BIOS registers from protected mode, preserving the register values across the real mode and protected mode switches by directly patching instructions. This allows for boot(8) to be larger than 64KB.
2012-10-08reduce the difference between i386 and amd64 versions of the speedstep codeJonathan Gray
2012-10-07Align the stack on a 64-byte boundary as required by "The 32-bit PA-RISCMark Kettenis
Run-time Architecture Document". GCC relies on this to properly align stack variables. ok guenther@, beck@
2012-10-04Clean up uninitialized warnings from cryptosoft and aesni.Christiano F. Haesbaert
Part of the work to remove -Wno-uninitialized. ok mikeb@
2012-10-04Use information provided by ACPI to attach secondary PCI host bridges.Christian Ehrhardt
ok kettenis@
2012-10-03Don't include <mips64/archtype.h> unless you really need it.Miod Vallat
2012-10-03Do not use <mips64/archtype.h> for loongson model numbers, but rather put theMiod Vallat
list in loongson's <machine/autoconf.h> directly. <mips64/archtype.h> is intended to be only used on ARCBios-like platforms.
2012-10-03Don't include <mips64/archtype.h> when you don't need it.Miod Vallat
2012-10-03Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs,Miod Vallat
which will remain in <machine/cpu.h>, and a new mips_cpu.h containing only the goriest md details, which are only of interest to a handful set of files; this is similar in spirit to what alpha does, but here <machine/cpu.h> does not include the new file.
2012-09-30Remove duplicated chunk; noticed by David GilmoreMiod Vallat
2012-09-29Work in progress support for the Power Indigo2 R8000 system (IP26). This isMiod Vallat
basically an IP22 system (R4000 Indigo2) with the ECC memory board of IP28, and a so-called ``streaming'' L2 cache. IP26 kernels currently boot single-user, but don't live long; I am suspecting a bug in the tcc cache routines, but am currently not able to find it (come to think of it, my understanding of how this cache works could be wrong, and of course there is no documentation for it but what can be gathered from IRIX' <sys/IP26.h> comments and defines). Hopefully this situation will improve in the near future; in the meantime I am commiting this as `work in progress' to make sure this code doesn't get lost.
2012-09-29Bring the `let decide ARCBios address at runtime' code to the SGI bootblocks,Miod Vallat
which allows them to run on IP26 (POWER Indigo2 R8000). Crank boot blocks version.
2012-09-29Do not hardcode ARCBios vector base, but rather compute it at runtime.Miod Vallat
This allows MI code to support both 32-bit ARCS systems, as well as 64-bit R8000 and R1x000 systems. While there, #if 0 out ARCBios routines currently not used by the kernel.
2012-09-29Basic R8000 processor support. R8000 processors require MMU-specific code,Miod Vallat
exception-specific code, clock-specific code, and L1 cache-specific code. L2 cache is per-design, of which only two exist: SGI Power Indigo2 (IP26) and SGI Power Challenge (IP21) and are not covered by this commit. R8000 processors also are 64-bit only processors with 64-bit coprocessor 0 registers, and lack so-called ``compatibility'' memory spaces allowing 32-bit code to run with sign-extended addresses and registers. The intrusive changes are covered by #ifdef CPU_R8000 stanzas. However, trap() is split into a high-level wrapper and a new function, itsa(), responsible for the actual trap servicing (which name couldn't be helped because I'm an incorrigible punster). While an R8000 exception may cause (via trap() ) multiple exceptions to be serviced, non-R8000 processors will always service one exception in trap(), but they are nevertheless affected by this code split.
2012-09-29Forgot this in previous commitMiod Vallat
2012-09-29Store the base value of coprocessor 0 system register, when running userland,Miod Vallat
into a global. This allows R12000 O2 systems to set the DSD bit in once for all, instead of having to set it every time in setregs().
2012-09-29Sort cpu and fpu list, and don't bother printing those we don't run on (yet).Miod Vallat
2012-09-29Handle the coprocessor 0 cause and status registers as a 64 bit value now,Miod Vallat
as some odd mips designs need moro than 32 bits in there. This causes a lot of mechanical changes everywhere getsr() is used.
2012-09-29Avoid an unnecessary copyin() call in the SYS__syscall handling path.Miod Vallat
2012-09-29Add a few more coprocessor 0 cause and config registers defines.Miod Vallat
2012-09-29Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlbMiod Vallat
knowledge to <machine/pte.h>. Add specific routines for tlb handling setup (at cpu initialization time) and tlb ASID wrap.
2012-09-29Introduce assembly macros for specific processor hazards: tlb update, statusMiod Vallat
register update, status register update causing a change to the interrupt enable flag, and a few other arcane ones. <mips64/asm.h> will provide (supposedly sane) defaults, and <machine/asm.h> may override these with better tuned versions. Use these macros instead of random strings of nop in the various .S files requiring hazard workarounds.
2012-09-29Move proc_trampoline, which is not really exception processing, from exception.SMiod Vallat
to context.S, to eventually allow alternate versions of exception.S to be used.
2012-09-29Use a much simpler linker script for the kernel, adapted from loongsonMiod Vallat
2012-09-29Provide a few more macros in <machine/asm.h> to wrap coprocessor 0Miod Vallat
move from/to register instructions, as well as a NOP macro. These will be used in a later diff to allow specific processors to use slightly different instructions or encodings.
2012-09-29Proide a mips_sync() macro to wrap asm("sync"), and replace gazillions ofMiod Vallat
such statements with it.
2012-09-27enable smscJonathan Gray
2012-09-27remove the zlib rfc text: these pages already point to gzip(1), whichJason McIntyre
has the references, and the rfc is not that relevant anyway;
2012-09-25Make sure we send MSIs to the primary CPU like we do on amd64.Stuart Henderson
This is a fixed version reinstating the previous commit, fix from Christian Ehrhardt, same fix from brad@.
2012-09-25Remove unused acpi locking code.Paul Irofti
To be replaced with higher level C routines once we settle for a common consistent set of atomic operations across platforms. Discussed with and okay by deraadt@ and kettenis@.
2012-09-25Reduce the diff between amd64/stand and i386/stand, requested by deraadt@.Pascal Stumpf
These create essentially the same bootblocks, so the build system should not be diverging too much, or at least easily diffable. There is still a lot of work to be done here, but this is the low-hanging fruit. ok jsing@
2012-09-22revert previous, breaks the treeStuart Henderson
2012-09-21Make sure we send MSIs to the primary CPU like we do on amd64.Mark Kettenis
Based on a diff from Christian Ehrhardt.
2012-09-21add register aliases "fp" and "AT" as available on Tru64 and Linux; ok miod@Christian Weisgerber
2012-09-19Set up PCI bus number resource accounting for the main PCI bus hierarchy.Mark Kettenis
2012-09-19Set up PCI bus number resource accounting for the main PCI bus hierarchy.Mark Kettenis
2012-09-19Add support for the rdrand instruction found in recent Intel processors.Jonathan Gray
Joint work with naddy@ ok naddy@ deraadt@
2012-09-19Add new drivers for virtio network (vio) and block devices (vioblk, the disksStefan Fritsch
attach as scsi disks). These are paravirtualized devices offered by some hypervisors like kvm and virtualbox. The virtio transport driver has the pci specific parts separated out. This will make it easier to add support for mmio (e.g. for ARM) later. OK mikeb OK jasper "commit what you have" deraadt
2012-09-15Adapt ieee.h, gdtoa and libc to the fact that we don't have 80-bitMartynas Venckus
floats on m88k. Agreed by miod@.
2012-09-15m88k does not have the m68k long double type actually (long double == doubleMiod Vallat
on this platform), so don't pretend it does, and don't build long double libm routines.
2012-09-12Define empty CDIAGFLAGS for programs that use Werror.Christiano F. Haesbaert
Makes "make build" build with WARNINGS=Yes on amd64. ok espie
2012-09-11Cope with PIE, if it is enabled. Note that this has not been completelyTheo de Raadt
tested, but it is time to get it in at least.
2012-09-11Cope with PIE, if it is enabledTheo de Raadt
2012-09-11Add -nopie to the linker flags.Mark Kettenis
2012-09-11Remove the 'OLF method' used for the transition from a.out to ELF andTheo de Raadt
for all the compat layers which are now gone. Linux compat still works because it always used another method in any case, and nothing looks at p_os anymore. ok jsing
2012-09-08Switch landisk to timecounters. Adapted from NetBSD.Miod Vallat
2012-09-08On SPARC64 VI/VII CPUs, use the lseep instruction in the idle loop to force aMark Kettenis
thread switch in the hope the other thread can do some useful work.
2012-09-08Switch hp300 to timecounters. From NetBSD via martin@Miod Vallat
2012-09-08Include files.agp to be able to check against NAGP in the drm agp glue.Martin Pieuchot
2012-09-07bump CPU feature strings to 12 chars since some names are now 8 charactersChristian Weisgerber
long, leaving no space for a trailing NUL; ok kettenis@
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