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register.
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files, for them to become useful.
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NetBSD driver, with the infinite loops removed, the negative heights fixed,
and the explicit delay() calls removed. And support for fonts wider than
8 pixels.
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identifier is actually the first word of the boards' shared ram, and might
have a legit value. Be sure to probe for the signature register before
deciding we have found a GIO board.
While there, if we have a glass console attached, don't bother probing it
again at autoconf time, since we have already identified it.
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and can return completely bogus values; writing these values back to the
register can have unexpected and hilarious side effects, such as disabling the
frame buffer.
Workaround this `feature' by reading the register in a loop until we read
twice the same value, and the value looks legit; then cache this value in a
global variable and handle the register from now on, as a write-only register.
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From NetBSD.
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setting %fs, resulting in it not getting restored properly later
ok mikeb@ deraadt@
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only. Ported from NetBSD, not tested due to lack of hardware, hopefully it
will be working as intended (fingers crossed)
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where applicable (i.e. Indy only).
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temporarily disabled (and then reenabled later). Will be necessary for the
next driver commit.
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ok miod@
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(NG1, XL, XGE) frame buffer.
Adapted from NetBSD; newport extended to support underline and fonts wider than
8 pixels, such as the default 12x22 Gallant font. Framebuffer depth computation
seems to be wrong on Indy models, to be investigated later (but doesn't prevent
text console from working).
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false positives.
Do not look for framebuffers past GIO EXP1, there shouldn't be anything there.
Add the console code machinery to attach a glass console on IP22, when the
appropriate drivers will exist.
On multihead systems, get console framebuffer address (well, sort of) from a
completely undocumented interface (knowledge taken from Linux, confirmed to
work on a dual-head Indigo 2 here).
While there, get frame buffer names from ARCBios whenever possible, to be used
in dmesg eventually.
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initial setup to be complete before switching to our trap handlers.
However, change guarded_{read,write}_* to clear BEV in the coprocessor 0
status register, and restore it afterwards, to use our fault handlers within
these functions. This makes these functions usable from consinit().
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these among frame buffer drivers. No functional change.
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layout in 64-bit mode. Found the hard way, of course.
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- break each hpc1/hpc3 child lists into two lists, one for the onboard
devices, and one for the expansion devices.
- do not try to attach Indy-only devices (pckbc, haltwo) on Challenge S.
- do not duplicate entries for expansion devices, only with different interrupt
numbers depending on the system, but instead use a single entry with -1 as
the interrupt level, and have the attachment glue figure out which
interrupt vector applies, depending upon the system.
- on expansion hpc1 (or 1.5) boards, do a minimal bus check to decide whether
or not the hardware we are attaching is there, since we currently don't
know how to tell E++ (sq only) and GIO32 SCSI (wdsc only) boards apart.
This hopefully will get rid of misleading `device not configured' messages.
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IP20, IP22 and IP24, and provide the necessary macros to compute interrupt
vectors numbers (from the int.c point of view) from given sources.
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to make the hpc3 bus_space_tag (similar to the imc one except for the
bus_space_barrier method) a global, compile-time known, object; which will in
turn help getting glass console to work (pckbc will depend on this).
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need to have knowledge of the underlying interrupt controller. No functional
change.
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invoke bufadjust() accordingly. Similar to what sysctl kern.bufcachepercent
does.
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<machine/reg.h> for the needs of struct sigcontext; said struct ought to
only use simple integer types.
Fixes build of groff on landisk.
ok pirofti@ (who had a similar diff)
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from a fork syscall done by the parent. Use __tfork, not rfork
here to match the ktrace records for the parent (CALL __tfork,
RET __tfork). ok guenther
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count processes instead of threads. New sysctl()s KERN_NTHREADS and
KERN_MAXTHREAD count and limit threads. The nprocs and maxproc kernel
variables are replaced by nprocess, maxprocess, nthreads, and maxthread.
ok tedu@ mikeb@
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to a word boundary.
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before them.
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cache is still not supported yet (needs extra code being worked on, as does
the R5000SC Indy).
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the current logic can be traced back to DaveM's intership at SGI in 1996,
and are adequate for the hardware he had access to.
However, ``recent'' Indigo2 and Indy systems are fit with a faster (33MHz
instead of 25MHz) GIO64 bus, which need different timing parameters, and
guess what? The PROM knows the right values to set.
Since programming these timing registers was apparently only necessary for
the Challenge S second interface:
1) only reprogram those registers on an IP24 (Indy, Challenge S) system.
2) pick proper values depending upon the actual GIO64 bus speed.
Item #1 fixes Ethernet operation on Indigo2 (at least my teal R4400SC).
Item #2 fixes Ethernet operation on my R5000SC Indy.
For the record, programming unoptimal value caused `TX DMA underrun' errors
(documented as `can't happen' in the HPC3 documentation, oh the irony),
which could be reproduced reliably with ypbind(8).
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necessary cache coherency work wrt similar virtual indexes of different
physical pages, depending upon two distinct global variables, instead of
a shared one. R4000/R4400 VCE requires a 32KB mask for PMAP_PREFER, which
is otherwise not necessary for pmap coherency (especially since, on these
processors, only L1 uses virtual indexes, and the L1 size is not greater
than the page size, as we are using 16KB pages).
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Indy PROM versions use different year bases - after all, using 1970 instead
of the previously used value of 1940 smelled like a bug, and probably was,
so this eventually got fixed in later PROM versions.
Instead of hardcoding a year base depending upon the system, we will now ask
ARCBios for its current year, and compare it to what can be read from the RTC
registers to figure out what year base is in use by the PROM.
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and O2 (other systems unaffected).
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ok deraadt@
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the timebase on Indigo 2, but 1970 on Indy (verified with the `date' command
at the PROM prompt and checking what values ended up in the DS1286).
Indy will no longer be 30 years in the future from an IRIX point of view.
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kernels. No need to walk the whole dma map doing nothing.
No functional change.
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every register write. Hinted by IRIX' <sys/z8530.h>.
While there, flip the CTS, DCD, RTS and DTR bits in registers #0 and #5.
Aforementioned header says they are inverted due to a hardware bug.
Tested on IP20, IP22 and IP24.
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PIO write buffer.
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layout is enough to enforce this. Don't request DMA page boundary alignment
when allocating them.
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hangs on resume. Discussed with and ok kettenis, haesbaert
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being configured and we'll see which boards need care. (Only ep(4) is known
to work so far, but I am waiting for review and approval of the changes
required to make it work on sgi). Anyone with a working ahb(4) EISA board to
spare?
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narrow these in the various ipXX_machdep.c. On IP22-like systems, narrow
them to 28 bit physical addresses, but unpessimize this by extending this
to 32 bit after autoconf, if no 28-bit limited hpc(4) device has been found.
Since physical memory on these systems start at 128MB, this means that Indigo
systems with more than 128MB memory will behave correctly (and so will Indy
systems with E++ boards and more than 128MB memory).
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PIO-only devices such as ep(4), with horrible performance on 3C579-TP.
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TX interrupts since the TX interrupt handler now correctly acknowledges it.
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install seen on IP22 and IP24.
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out to be the same value).
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