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in sysctl hw.ncpufound; ok miod kettenis
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MULTIPROCESSOR.
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in sysctl hw.ncpufound; ok miod kettenis
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simplelocks + splhigh().
First part of making it possible to make mpsafe softinterrupts.
"oh yes, definitely" miod@
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ok miod@
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differently at times.
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these are completely unrelated as long as there is only one pci bus per
bridge.
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else.
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enable it (I have found the code that does enable it problematic on
quite a few machines, however, that's a different issue). So provide
some code that so if the bios initialised the iommu for us, we'll use
what it gave us. Makes iommu work on a machine of todd's.
while i'm here, we don't need to scan all pci functoins to find the
hypertransport bridge. the gart is always on function 3, so just scan
for all the bridges and not iterate over the functions too.
Thanks to todd for his infinite patience while I gave him diffs that
went ``Boom!''.
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the first cpu on dual-cpu boards; this will be fixed later. Just don't
disable it at the prom.
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a complete physical address. Also add proper cpu pa<->device pa for dma
on Origin 200.
This lets xbridge work and route interrupts correctly on Origin 200.
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Otherwise we get stuck interrupted by the ``tx empty'' condition.
Also, on Origin 200 the second interrupt vector has to be computed
differently, which adds to the ``I wish I never had looked at this code''
trauma.
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for it.
It is very unlikely this still compiles, the hardware is dead. It isn't in any
arch's config file. the sparc sbus code is even commented out in files.sparc.
Not to mention that the code is fucking appauling, doesn't even know that sparc
got bus.h ages ago, still uses vtophys(), defines all types of functions to
arch-specific hacks.
I will miss the bitchy comments, though...
As a note to other drivers: this is the fate that awaits you if you screw up my
ctags on commonly used functions.
"you have my ok" claudio@, "zap zap zap" deraadt@
If i've missed any bits, please remove them.
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when we setmapsize it's not zero.
*sigh*
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zero so that we return an empty map on error.
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I just spent five hours looking in the wrong place because of this.
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For the possibility of sleeping, the first two flags are UVM_PLA_WAITOK
and UVM_PLA_NOWAIT. It is an error not to show intention, so assert that
one of the two is provided. Switch over every caller in the tree to
using the appropriate flag.
ok art@, ariane@
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ok reyk@
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bus address space. Fixes a problem reported by david@.
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some years ago for KL enumeration, building on the existing XBow support
to limit ourselves to a single node for now.
This is a work-in-progress; it currently lacks complete interrupt code,
as well as PCI resource management. And there are likely bugs creeping
inside.
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of the Ethernet address.
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instead of assuming it is. Makes sure we actually spin up the secondary
CPUs on Serengeti machines with certain firmware revisions.
Tested by Christophe Latt.
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(virtual) machines.
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SuperIO part, the Ethernet part needs a whole driver); kernel now boot
single user (or bsd.rd). Joint work with jsing@
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hog the bus, and also to fake a valid interrupt register. The IOC3 device
is not a PCI device at all, but pretends to be one. Except its own
registers overlap the PCI configuration space, and some flavours do not
support disabling memory space in the control register, violating the PCI
specs. Fun.
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them manually.
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based on the BIOS memory map.
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processors, so the registers to configure addition HyperTransport links
are absent. Don't try attaching addition pci busses on these processors
to avoid probing non-existant registers.
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with so-called ``external memory fault'' which cause I can't figure out.
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driver handlers get invoked at the right level. Parts from NetBSD.
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kept in a separate intrhand array, with their own enable bits so that
soft interrupts sharing the same level only get invoked if really triggered.
Inspired by NetBSD with significant changes.
ok kettenis@
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addresses against PAGE0 information, instead than only the BAR mapping
sti region #0; on Visualize FXe, PAGE0 will point to another BAR and we would
not recognize the display as the console device.
Tested on Visualize FX4 (on C240), Visualize EG (on B1000) and Visualize FXe
(on B2000).
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dmamap rather than all the bytes that are described by the sg list we're
mapping.
tested on iwn by me and beck@
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the bug in it. bugfix will be committed next.
make bus_dmamap_load_raw respect the constraints of the dmamap we're
loading the raw memory into, particularly the segment size constraint.
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IPL_SOFTSERIAL to IPL_SOFTTTY.
tested by oga@
ok miod@
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