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2002-10-27Turn into a really useful configuration file, i.e. GENERIC tuned for sun4cMiod Vallat
hardware, like SUN4M is for sun4m hardware.
2002-10-27Typo in commentMiod Vallat
2002-10-25fake intrcnt (for now) such that vmstat works (;Michael Shalayeff
2002-10-25allow reading the direct mapped segment through the kmemMichael Shalayeff
2002-10-24Add missing pmap_update(9) after pmap_kenter_pa(9); art@ ok.Federico G. Schwindt
2002-10-24nlist does no aout no more, fuget about som tooMichael Shalayeff
2002-10-24use loadfileMichael Shalayeff
2002-10-24Add va_copy() as necessary for powerpc, same protections as was addedDale Rahn
recently on other architectures.
2002-10-23Add a trivial va_copy() macro to all architectures but powerpcTodd C. Miller
(which I will leave for Dale since it needs special handling). From NetBSD (and same as sparc64). espie@ OK
2002-10-22do not force single-user; pt out by fries@Michael Shalayeff
2002-10-21make an ieeefp regress pass; miod@ okMichael Shalayeff
2002-10-21try harder to sync in dmamap_syncMichael Shalayeff
2002-10-20fxp now works on bigendian, add it to macppc.Dale Rahn
2002-10-19Kill register.Hugh Graham
Add intvec counting. Adapt to openbsd WOPEN handling. All untested but does compile...
2002-10-18this is a precision architecture -- be more precise about fault types and in ↵Michael Shalayeff
sigsegv deliveries; vm_ssize is in pages, apparently
2002-10-18Remove some very pointless 'if 0' code, some of which prevented compilationDale Rahn
with gcc3.2, and add a ';' for a case statement as it requests.
2002-10-18Do not define astpending twice, once non-volatile and one volatile.Dale Rahn
2002-10-17use shadows on fpu cxsw (and fix arg0 trashing), do not restore shadowed ↵Michael Shalayeff
regs before rfir
2002-10-17sync with gcc version, fixes bug in sftp where it had a 64 bit parameterDale Rahn
which straddled the last register first stack parameter.
2002-10-17Correct io space config after last patch. allows fxp to workDale Rahn
(with pending fxp BE diffs)
2002-10-17convert to use vm_page_md instead of pmap_physseg, make code smaller and ↵Michael Shalayeff
simpler, indeed; after art's suggestion and by looking into his diffs oneyed
2002-10-15a few missing options and pseudo-devs, noticed by miod@ and dhartmei@Michael Shalayeff
2002-10-15missing initmsgbuf(), noticed by miod@Michael Shalayeff
2002-10-14Fix from FreeBSD for atlhon problems with mtrr and XFree86. Ok deraadt@Matthieu Herrb
FreeBSD commit messages say: Some BIOSs are using MTRR values that are only documented under NDA to control the mapping of things like the ACPI and APM into memory. The problem is that starting X changes these values, so if something was using the bits of BIOS mapped into memory (say ACPI or APM), then next time they access this memory the machine would hang. This patch refuse to change MTRR values it doesn't understand, unless a new "force" option is given. This means X doesn't change them by accident but someone can override that if they really want to. PR: 28418 Tested by: Christopher Masto <chris at netmonger dot net>, David Bushong <david at bushong dot net>, Santos <casd at myrealbox dot com> Make the MTRR code a bit more defensive - this should help people trying to run X on some Athlon systems where the BIOS does odd things (mines an ASUS A7A266, but it seems to also help on other systems). Here's a description of the problem and my fix: The problem with the old MTRR code is that it only expects to find documented values in the bytes of MTRR registers. To convert the MTRR byte into a FreeBSD "Memory Range Type" (mrt) it uses the byte value and looks it up in an array. If the value is not in range then the mrt value ends up containing random junk. This isn't an immediate problem. The mrt value is only used later when rewriting the MTRR registers. When we finally go to write a value back again, the function i686_mtrrtype() searches for the junk value and returns -1 when it fails to find it. This is converted to a byte (0xff) and written back to the register, causing a GPF as 0xff is an illegal value for a MTRR byte. To work around this problem I've added a new mrt flag MDF_UNKNOWN. We set this when we read a MTRR byte which we do not understand. If we try to convert a MDF_UNKNOWN back into a MTRR value, then the new function, i686_mrt2mtrr, just returns the old value of the MTRR byte. This leaves the memory range type unchanged. I have seen one side effect of the fix, which is that ACPI calls after X has been run seem to hang my machine. As running X would previously panic the machine, this is still an improvement ;-) PR: 28418, 25958 Tested by: jkh, Christopher Masto <chris at netmonger dot net>
2002-10-14Use uvm_km_valloc_prefer_wait instead of doing the same thing manually.Artur Grabowski
<miod> well, my comments are "looks sane, works for me, ok to commit"
2002-10-13better USER_LDT comment; originally suggested by seb@todesplanet.de; ok deraadtPeter Valchev
2002-10-13Remove more '\n's from panic() statements. From Chris Kuethe.Kenneth R Westerback
2002-10-13track the end of physmem for use in dmmem_allocMichael Shalayeff
2002-10-13split the scp/iscp/scb between the cache lines, make the leds blink betterMichael Shalayeff
2002-10-12Remove more '\n's from panic() statements. Both trailing and leading.Kenneth R Westerback
Last bits of diff generated by Chris Kuethe.
2002-10-12Remove more '\n's from panic() statements. Both trailing and leading.Kenneth R Westerback
Diff generated by Chris Kuethe.
2002-10-10protect against multiple inclusion; pointed out by naddy, miod okPeter Valchev
2002-10-09pretty printTheo de Raadt
2002-10-07this removes the functionality of adding allocatedMichael Shalayeff
pages into the queue already containing allocated pages. breaks i386:setup_buffers() because of this.
2002-10-07also s/_PSW/_PSL/Michael Shalayeff
2002-10-07s/PSW_/PSL_/ to match other archsMichael Shalayeff
2002-10-07proper terminate the user stack on signalMichael Shalayeff
2002-10-07on implementations w/ fpu included unimplemented instructionsMichael Shalayeff
are signaled through the exception trap w/ invalid opcode marked instruction in the exception registers, not through the emulation trap (as long as the fpu is enabled, of course). parse emulation from the exception trap as well as the emulation trap and fix the dispatcher into usable condition. parse invalid op exception on trap and signal the user appropriately. reset the exception on exec and for child on fork. the later is appropriate since exceptions are delayed until next fpu instruction, which was in the parent indeed, let him get it. save parent's fpu context on fork before cipying it, if the parent owned the fpu.
2002-10-07Improved workaround for cardbus support on macppc. This allows mappings toDale Rahn
be put in the cardbus register which really work instead of crashing the machine. if_dc @cardbus now works, xl@cardbus will configure, but does not work properly (endian?) wdc should work fine, but has not been tested recently.
2002-10-06No more need to initialize the result list before uvm_pglistalloc.Artur Grabowski
2002-10-06Declare nbuf just like all other architectures.Artur Grabowski
2002-10-06Garbage collect __HAVE_SPLASSERT. It wasn't necessary.Artur Grabowski
2002-10-05spelling.Federico G. Schwindt
2002-10-04Aasking to load an already loaded map is not a "warn and pray" kinda thing.Jason Wright
2002-10-01need fpemu for the geckoMichael Shalayeff
2002-10-01a few missing generic devicesMichael Shalayeff
2002-10-01Do not enable the code that makes use of the vertical retrace interruptMiod Vallat
to update the colormap, as it causes _some_ machines to freeze solid; could not be reproduced here, thanks to Thomas Koellmann (koellmann at gmx dot net) for reporting this problem and testing this change. ok deraadt@
2002-10-01If the framebuffer is being run in 32bit mode, register a shutdown_hookMiod Vallat
to bring it in a prom-friendly mode upon halting the system, like the other > 8 bit framebuffers do.
2002-09-30Evil, evil, evil typo broke innocent ramdisks. Die!Miod Vallat
2002-09-28Add support for OS defined halt action on Pele and Spitfire.Hugh Graham
Testing by Brandon Creighton and Jim Uhl.