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when recording
ok oga, deraadt
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In the future, we need to mark the correct parts of the direct map
uncached, but that's another diff.
art@, kettenis@ ok.
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ok deraadt@, miod@
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between instances, saving space in the kernel. feedback from many (some
incorporated, some left for future work).
ok deraadt, kettenis, "why not" miod.
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always retrieve the font metrics, even on older (< 2.9) prom, so do it.
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be acked by the hardware before continuing; this makes Ross systems
stable when using hme; from NetBSD.
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ok drahn@, sthen@ tested.
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ok drahn@, todd@ tested.
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theoretically the current solution of using the direct (and direct
uncached) maps is better for tlb pressure, two direct maps is dangerous,
especially when we support Page Attribute Tables (soon), since that will
cause illegal cache aliases. When that work is done a clever solution
may be worked out.
"reluctant ok, the uncached direct map is evil" art@
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MD code would free resources that couldn't be freed until we were no
longer running in that processor. However, it's is unused on all
architectures since mikeb@'s tss changes on x86 earlier in the year.
ok miod@
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adding splsoftassert().
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made testers of art's affinity diff go insane)
ok krw@ miod@
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- Split up run queues so that every cpu has one.
- Make setrunqueue choose the cpu where we want to make this process
runnable (this should be refined and less brutal in the future).
- When choosing the cpu where we want to run, make some kind of educated
guess where it will be best to run (very naive right now).
Other:
- Set operations for sets of cpus.
- load average calculations per cpu.
- sched_is_idle() -> curcpu_is_idle()
tested, debugged and prodded by many@
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faults on machines where we map nvram write-only (through the clock chip).
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As a small bonus this now actually zeroes the whole struct, not just the
non-varying sized part.
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doesn't need the second pmap =. "ok if you tested it" kettenis@
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with different locking mechanism. 88110 soft ipi are replaced with an
ipi callback which is checked upon return from exception (it can not be kept
as a softintr, as the generic softinterrupt code doesn't have per-cpu
pending softintr queues).
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CPU_INFO_FOREACH() only covers attached cpus. With drahn@, ok kettenis@
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remove the special casing in splassert().
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levels. This will allow for platforms where soft interrupt levels do not
map to real hardware interrupt levels to have soft ipl values overlapping
hard ipl values without breaking spl asserts.
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in the DEBUG code, since these values aren't used there anymore.
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ok miod@
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11h (Turion) still needs testing, so isn't part of this commit.
ok reyk@, marco@
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Firstly, don't keep identical data for each of the GARTs (we keep them
in sync, but there is one per cpu socket), all that varies is the
pci_tag_t, so just keep an array of those and have the rest of the
information once.
Secondly, don't keep the softc as a global, use the _cookie field of the
dmatag_t, that's what it's there for.
Finally, use dmamap_map to map the page tables, instead of the direct NC
map. This is because later changes to support PAT will be a lot easier
with one direct map (where we change the cacheability if needed), since
otherwise it's just asking for illegal cache aliases.
More changes will be upcoming.
Tested by a few people, with an without bigmem, thanks to those.
weingart@ liked the direction this is going, marco@ and kettenis@ oked it.
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a define needed to get to ``private'' functions that needs to be defined
5 or more times isn't much use and may cause namespace issues anyway.
Other archs will probably follow.
Discussed in portugal. "Hell yes" weingart@, ok kettenis@, no
objections miod@
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on amd64 as well.
ok dlg@
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ok jsg@
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acceleration it is a tad bit slow, so leave this disabled for now.
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