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2007-05-22Add elory(4).Mark Kettenis
2007-05-22Add option HP8700_CPU.Mark Kettenis
2007-05-22Hook up astro(4).Mark Kettenis
2007-05-22protect more variables from existing outside of locore, should fixMartin Reindl
cpuinfo breakage (but my make build is still running) ok gwk@
2007-05-22enable uts(4) - USB touchscreen supportRobert Nagy
2007-05-21Add support for 8700/pcxw2 cpu.Mark Kettenis
2007-05-21Ask firmware for reset before trying ourselves; needed for four-digit b/c/jMark Kettenis
workstations. tested by otto@, krw@; ok deraadt@
2007-05-21Import code to support the Elroy chip from hppa64 and make it actually work.Mark Kettenis
Still a bit of a hack, but it makes the onboard devices work.
2007-05-21Implement deep interrupt swizzling by mapping all four PCI interrupt pinsMark Kettenis
for PCI-PCI bridges and passing the mapping to the attached bus device. MD code can use these when mapping PCI device interrupts. This diff adds such code for amd64 and i386. This fixes interrupt mapping for devices that sit behind two PCI-PCI bridges where the firmware only provides a mapping for the first PCI-PCI bridge. tested by sturm@, krw@, and a few others, ok deraadt@
2007-05-21Make iommu_dvmamap_unload cleanup properly.Mark Kettenis
2007-05-21Add msk(4).Mark Kettenis
2007-05-21Initial stab at a driver for the Astro chip. Mostly IOMMU code to handleMark Kettenis
coherent DMA.
2007-05-21timecounters for armish.Dale Rahn
2007-05-21Switch pcfiic to rwlock.Jonathan Gray
ok dlg@ kettenis@
2007-05-20lockmgr -> rwlock for piic(4), kiic(4) and smu(4);Thordur I. Bjornsson
smu(4) tested by kettenis@, ok krw@
2007-05-20Fix KERNBASE, so that profiling kernels initialize (but profiling is brokenMiod Vallat
at the moment).
2007-05-20Since we no longer use 3 bits but the whole 7 to get the processor revisionMiod Vallat
number, we should test for 10, not 2, as the revision for which the xxx.usr errata applies; also, going through the errata, revision 2/10 (1010x) _is_ affected.
2007-05-20On AV-class machines, SCSI interrupts still come from VIA2, not PSC, soMiod Vallat
IPL_BIO should not be modified. Found the hard way by martin@
2007-05-20Replace ASSERT with KDASSERT and get rid of its definition; while there,Miod Vallat
remove some #if 0 dead code which won't get ressurrected anytime soon.
2007-05-20Remove unused badaddr().Miod Vallat
2007-05-20Remove irrelevant code and defines.Miod Vallat
2007-05-20Check for codec presence in match(), and don't attach if none is found.Miod Vallat
ok kettenis@
2007-05-20addess -> addressMiod Vallat
2007-05-20option AHC_CTRL_ID is not used.Miod Vallat
2007-05-19Add some phy's found on certain xl(4) models. From brad at comstyle dot com.Mark Kettenis
2007-05-19Uncomment em(4) entry. From brad at comstyle dot com.Mark Kettenis
2007-05-19Oops, get the ``disabling cpu'' message correct.Miod Vallat
2007-05-19Silence a diagnostic message in multiprocessor kernels, it makes things worse.Miod Vallat
2007-05-19Send an IPI in signotify() if the process runs on a different processor,Miod Vallat
similar to the fix which went into i386 and amd64 a few weeks ago.
2007-05-19Force other processors to spin when one is in ddb.Miod Vallat
2007-05-19(disabled) option for PCIAGP. at least lets i945 chipsets workTed Unangst
ok dim
2007-05-19aps works on amd64, ok jsgTed Unangst
2007-05-19Uncomment entry for xl(4) here too.Mark Kettenis
2007-05-19Add a GENERIC.MP configuration, not for the faint of the heart, if you wantMiod Vallat
to play.
2007-05-19Try reducing the number of IPIs, by only reinflicting them to us if we areMiod Vallat
lowering the spl. Also, warn and halt in tracks if the interrupt pin of a secondary cpu never clears (found the hard way in one of the 2P256 modules here), since there is nothing better we can do. Last, do not attempt to handle VME interrupts on secondary processors yes (this confuses the bus, since both processors will perform a VME interrupt acknowledge sequence, but only one will succeed). This lets processes correctly run on all the available processors in single-user mode, but there are still issues to sort out.
2007-05-19Uncomment xl(4).Mark Kettenis
2007-05-19Simpler asm constraints for simplelock operations.Miod Vallat
2007-05-19Kernel crash dump support for arm-based platform, with minimal support inMiod Vallat
libkvm, but all the necessary information for a complete _kvm_kvatop() is available in the crash dump.
2007-05-19Implement splassert for armish and zaurus.Miod Vallat
2007-05-19Use atomic operations in set_sint() instead of disabling interrupts in theMiod Vallat
function. ok kettenis@
2007-05-18More work in IPI processing: actual processing is now done with interruptsMiod Vallat
enabled, and is delayed if the current spl is not high enough; setipl() and raiseipl() will retrigger an IPI interrupt if there are any pending IPIs.
2007-05-18Move proc_do_uret() around so that it can fall through no_ast instead ofMiod Vallat
jumping to it. No functional change.
2007-05-18In spl0(), really process soft interrupts at IPL_SOFT instead of whateverMiod Vallat
level we were at.
2007-05-18Revert previous revision, and do it again correctly.Miod Vallat
2007-05-18Fix io space access.Mark Kettenis
tested by krw@, miod@, ok deraadt@
2007-05-18regenMark Kettenis
2007-05-18Add IDs for 8700/pcxw2 cpu and fpu.Mark Kettenis
2007-05-18Instead of checking whichqs directly, add a "sched_is_idle()" macro toArtur Grabowski
sys/sched.h and use that to check if there's something to do. kettenis@ thib@ ok
2007-05-18remove the COMPAT entries. they are not useful hereTed Unangst
2007-05-17Since we're initializing everything in pmap_pinit, it's probably a goodArtur Grabowski
idea to initialize pm_cpus as well. Otherwise we'll get stray tlb shootdowns and pm_cpus is not clear on exit sometimes.
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