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framebuffer for the console on SGI O2 workstations. X is still supported via
wsfb(4) by switching back to the unaccelerated linear framebuffer mode.
Some hardware details and magic numbers from NetBSD's crmfb(4) driver.
ok miod@ jasper@ "Sure, go for it" deraadt@
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hanging machines. backed out correctly this time, as pointed out by tedu.
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are likely set but don't need specific handling.
This silences the interrupt handler if DIAGNOSTIC in some cases.
ok grange@ deraadt@
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From brad@comstyle.com.
ok deraadt@
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are mapped uncached anyway.
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before mc attaches, as intended.
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to disable NMI sources in addition to interrupt sources, and we can not
use a quick sequence with shadowing frozen as done for atomic ops.
This lets GENERIC.MP boot multiuser on MVME197DP boards, and is so far stable
enough to be able to recompile a kernel from scratch (with make -j2).
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since it was intended to service NMI occuring in user mode, and we could
end up invoking preempt() and have another cpu start using this stack,
with interesting results.
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if another processors sends us an IPI, it will get handled later.
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can be interrupted by NMI; move the SMP version of these routines from
inlines to a separate file (kernel text shrinks 20KB...).
Since the implementation for 88110 becomes really hairy, the pre-main() code
is responsible for copying the appropriate code over for kernels configured
for both 88100 and 88110 cpus, to avoid having to choose the atomicity
strategy at runtime. Hairy, I said.
This gets GENERIC.MP run much further on 197DP. Not enough to reach multiuser
mode, but boots up to starting sshd and then panics.
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transfer with one command. Build on this and the recent minphys() changes
in the sdmmc layer to crank transfers at the maximum possible size instead
of a sad DEV_BSIZE.
Depending on your controller, this can speed up sdmmc I/O up to 2.5 times.
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message and bail out early instead of dropping packets to be transmitted.
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code from mlarkin and me
help from art,toby,jordan and several others
ok jordan, go for it deraadt
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xmem didn't return the expected value, spin doing regular loads until it
appears we have a chance to grab the lock again.
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let it attach on them now.
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delay strategy variable in locore now; this fixes the occasional console
output artefacts on MVME177.
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bad[pv]addr work again on MVME147.
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ok kettenis@
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recent driver work; this gives us better osiop and vs drivers, vsbic
(although currently disabled on 68060 boards until more bugs are fixed),
and the ability to boot and root off vs and vsbic.
Existing code is not modified and still uses memory mapped structures;
this might change eventually as more code gets factorized and moved to
MI land.
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return a sensible value instead of an empty string.
tested by jasper@
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synchronizes the pipeline on 88110.
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for they will attempt to dereference it and having NULL readable while
in the kernel is just cheating.
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hints and ok kettenis@
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sparc64 is dma coherent and won't be needing this.
ok kettenis@.
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larger bsd.rd to load correctly. Tested on MVME147 (if_le) and MVME167 (if_ie).
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"I like it" deraadt "sweet" tedu "love it" marco
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- dma_cachectl() split into a ``local cpu only'' and ``all cpus'', and an ipi
to broadcast ``local dma_cachectl'' is added.
- cpu_info fields are rearranged, to have the 88100-specific information
and the 88110-specific information overlap, and has many more 88110
ugly things.
- more ipi handling in the 197-specific area. Since it is not possible to
have the second processor receive any hardware interrupt (selection
is done on a level basis via ISEL, and we definitely do not want the
main cpu to lose interrupts), the best we can do is to inflict ourselves
a soft interrupt for late ipi processing. It gets used for softclock and
hardclock on the secondary processor, but since the soft interrupt
dispatcher doesn't have an exception frame, we have to remember parts
of it to build a fake clockframe from the soft ipi handler (ugly but
works).
This now lets GENERIC.MP run a few userland binaries before bugs trigger.
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from interrupt() and related function pointers.
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as additional argument. This will allow intermediate layers between
scsi devices such as sd and scsi host adapters to take appropriate
action if necessary.
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now set up both the exception frame structure and the exception stack as
soon as possible, so that we can safely get interrupted by an NMI as soon
as we reenable shadowing.
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if attempts are made to read it. So read MSR_TEMPERATURE_TARGET only
when ci_model == 0xe.
Found when my Core i7 box blew up. FreeBSD allows a few more chips
but this allows my box to boot.
ok jsg@
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in seperate variables in struct cpu_info instead
of duplicating the process of extracting it from the signature.
Discussed with several, 'just do it' weingart@, ok mikeb@
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in seperate variables in struct cpu_info instead
of duplicating the process of extracting it from the signature.
Use this value when determining the bus clock on P6/family 0x6
chips, which fixes speedstep on bernd@'s ThinkPad x200s.
Discussed with several, 'just do it' weingart@, ok mikeb@
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this defeats the purpose of having a separate stack at this point... Oopsie
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Reported by and diff from Remco <remco at d-compu.dyndns.org>, thanks!
Checked with kettenis@.
ok kettenis
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us a chance to parse it and generate strings for hw.product and hw.vendor.
Use the "name" property instead. This should give us a better chance of
booting on UltraSPARC T2+ systems.
ok deraadt@
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string length exceeds maxlength.
ok miod@
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