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2012-04-15Add option EISAVERBOSE to IP22 kernelsMiod Vallat
2012-04-14User area hasn't been double-mapped in a long timePhilip Guenthe
2012-04-13Avoid horrible namespace pollution of <machine/signal.h> pulling inMiod Vallat
<machine/reg.h> for the needs of struct sigcontext; said struct ought to only use simple integer types. Fixes build of groff on landisk. ok pirofti@ (who had a similar diff)
2012-04-11The first ktrace record for a newly spawned thread is a returnMike Belopuhov
from a fork syscall done by the parent. Use __tfork, not rfork here to match the ktrace records for the parent (CALL __tfork, RET __tfork). ok guenther
2012-04-10Count traps and fpu context switches.Miod Vallat
2012-04-10Make the KERN_NPROCS and KERN_MAXPROC sysctl()s and the RLIMIT_NPROC rlimitPhilip Guenthe
count processes instead of threads. New sysctl()s KERN_NTHREADS and KERN_MAXTHREAD count and limit threads. The nprocs and maxproc kernel variables are replaced by nprocess, maxprocess, nthreads, and maxthread. ok tedu@ mikeb@
2012-04-09No need to round VCEI addresses, and VCED addresses only need to be roundedMiod Vallat
to a word boundary.
2012-04-09Attach eisa devices after all the onboard devices have attached rather thanMiod Vallat
before them.
2012-04-09More errata bandaid for the R4000SC is necessary in the tlb handlers.Miod Vallat
2012-04-08Enable option CPU_R4600, verified to work on an R4600PC Indy. The secondaryMiod Vallat
cache is still not supported yet (needs extra code being worked on, as does the R5000SC Indy).
2012-04-08Be more careful when reprogramming the sq(4) DMA and PIO timing parameters;Miod Vallat
the current logic can be traced back to DaveM's intership at SGI in 1996, and are adequate for the hardware he had access to. However, ``recent'' Indigo2 and Indy systems are fit with a faster (33MHz instead of 25MHz) GIO64 bus, which need different timing parameters, and guess what? The PROM knows the right values to set. Since programming these timing registers was apparently only necessary for the Challenge S second interface: 1) only reprogram those registers on an IP24 (Indy, Challenge S) system. 2) pick proper values depending upon the actual GIO64 bus speed. Item #1 fixes Ethernet operation on Indigo2 (at least my teal R4400SC). Item #2 fixes Ethernet operation on my R5000SC Indy. For the record, programming unoptimal value caused `TX DMA underrun' errors (documented as `can't happen' in the HPC3 documentation, oh the irony), which could be reproduced reliably with ypbind(8).
2012-04-06Make the logic for PMAP_PREFER() and the logic, inside pmap, to do theMiod Vallat
necessary cache coherency work wrt similar virtual indexes of different physical pages, depending upon two distinct global variables, instead of a shared one. R4000/R4400 VCE requires a 32KB mask for PMAP_PREFER, which is otherwise not necessary for pmap coherency (especially since, on these processors, only L1 uses virtual indexes, and the L1 size is not greater than the page size, as we are using 16KB pages).
2012-04-06Rework IP22 RTC year base computation, again. It turns out that differentMiod Vallat
Indy PROM versions use different year bases - after all, using 1970 instead of the previously used value of 1940 smelled like a bug, and probably was, so this eventually got fixed in later PROM versions. Instead of hardcoding a year base depending upon the system, we will now ask ARCBios for its current year, and compare it to what can be read from the RTC registers to figure out what year base is in use by the PROM.
2012-04-06Get serial console speed from ARCBios earlier; repairs serial console on OctaneMiod Vallat
and O2 (other systems unaffected).
2012-04-06tedu the raidframe.Joel Sing
ok deraadt@
2012-04-05In the neverending tradition of never making things simple, SGI used 1940 asMiod Vallat
the timebase on Indigo 2, but 1970 on Indy (verified with the `date' command at the PROM prompt and checking what values ended up in the DS1286). Indy will no longer be 30 years in the future from an IRIX point of view.
2012-04-05Bail out of bus_dmamap_sync() earlier in the non-PREWRITE cases on TGT_COHERENTMiod Vallat
kernels. No need to walk the whole dma map doing nothing. No functional change.
2012-04-05Lower ZS_DELAY() back to what it was, but issue a bus_space_barrier() afterMiod Vallat
every register write. Hinted by IRIX' <sys/z8530.h>. While there, flip the CTS, DCD, RTS and DTR bits in registers #0 and #5. Aforementioned header says they are inverted due to a hardware bug. Tested on IP20, IP22 and IP24.
2012-04-05Add an explicit bus_space_barrier() function for revision 3 hpc, which has aMiod Vallat
PIO write buffer.
2012-04-05DMA descriptors only need to be aligned on 8-byte boundaries, and the structMiod Vallat
layout is enough to enforce this. Don't request DMA page boundary alignment when allocating them.
2012-04-04Make sure that identifycpu() is run only once; fixes occasionalMike Belopuhov
hangs on resume. Discussed with and ok kettenis, haesbaert
2012-04-03Uncomment eisa0 attachment. People can then complain about their boards notMiod Vallat
being configured and we'll see which boards need care. (Only ep(4) is known to work so far, but I am waiting for review and approval of the changes required to make it work on sgi). Anyone with a working ahb(4) EISA board to spare?
2012-04-03Default DMA-reachable address constraints to the whole address space, andMiod Vallat
narrow these in the various ipXX_machdep.c. On IP22-like systems, narrow them to 28 bit physical addresses, but unpessimize this by extending this to 32 bit after autoconf, if no 28-bit limited hpc(4) device has been found. Since physical memory on these systems start at 128MB, this means that Indigo systems with more than 128MB memory will behave correctly (and so will Indy systems with E++ boards and more than 128MB memory).
2012-04-02EISA bus attachment glue for Indigo 2 systems. Currently only tested withMiod Vallat
PIO-only devices such as ep(4), with horrible performance on 3C579-TP.
2012-04-01Fix merge botch when porting this from NetBSD; we don't need to disable theMiod Vallat
TX interrupts since the TX interrupt handler now correctly acknowledges it.
2012-04-01Increase delay between chip register accesses. Fixes the console freeze duringMiod Vallat
install seen on IP22 and IP24.
2012-03-31softintr_establish() takes IPL_xxx, not SI_xxx (harmless here since they turnedMiod Vallat
out to be the same value).
2012-03-29Put more smarts into the limited bootblocks brain; they will now happilyMiod Vallat
recognize a kernel bootpath (when not autobooting) even if it does not start with a /, and will also recognize when this is a full path (e.g. bootp()mykernel), in which case OSLoadPartition does not need to be prepended to the constructed path. This will allow ELF kernels to be booted on ELF-unaware PROM with bootp()bootecoff bootp()kernel without doomed-to-fail tomfoolery to convert the 64-bit ELF kernel to a 32-bit ECOFF binary.
2012-03-29Link IP22 kernels at 8MB rather than 1MB, to prevent bsd.rd from overlappingMiod Vallat
the PROM data area.
2012-03-28regenMiod Vallat
2012-03-28Work in progress support for the SGI Indigo, Indigo 2 and Indy systemsMiod Vallat
(IP20, IP22, IP24) in 64-bit mode, adapated from NetBSD. Currently limited to headless operation, input and video drivers will get ported soon. Should work on all R4000, R4440 and R5000 based systems. L2 cache on R5000SC Indy not supported yet (coming soon), R4600 not supported yet either (coming soon as well). Tested to boot multiuser on: Indigo2 R4000SC, Indy R4000PC, Indy R4000SC, Indy R5000SC, Indigo2 R4400SC. There are still glitches in the Ethernet driver which are being looked at. Expansion support is limited to the GIO E++ board; GIO boards with PCI-GIO bridges not ported yet due to the lack of hardware, and this kind of driver does not port blindly. Most of this work comes from NetBSD, polishing and integration work, as well as putting as many ``R4x00 in 64-bit mode'' erratas as necessary, by yours truly. More work is coming, as well as trying to get some easy way to boot install kernels (as older PROM can only boot ECOFF binaries, which won't do for the kernel).
2012-03-28Allow dma map boundary smaller than the kernel page size to work inMiod Vallat
bus_dmamap_load*().
2012-03-27fix indentationTheo de Raadt
2012-03-27only attempt to calculate bus_clock if we can't get tables from acpiJonathan Gray
2012-03-27Make the bus_clock calculations happen later in the boot process soJonathan Gray
they can be conditionally called in future. This makes the i386 speedstep code closer to the amd64 code (though still with the added complications of VIA support and the *_update_cpuspeed callbacks)
2012-03-27Implement the AMD suggested workaround for family 10h & 12h errata 721Jonathan Gray
"Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h. AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64. ok deraadt@
2012-03-27Run identifycpu() on its own cpu.Christiano F. Haesbaert
Discussed with many on hackers. "Go ahead" kettenis@ "Get to it" deraadt@
2012-03-26Make writes block if the message queues are full.Mark Kettenis
2012-03-26Increase the size of the message queues such that we can handle the defaultMark Kettenis
"MTU" of 4096 bytes.
2012-03-26Add APM_IOC_HIBERNATETheo de Raadt
2012-03-26Fix an integer math error when using the result of uvm_page_rle, andMike Larkin
at the same time increase said function's max RLE page count return value. Add hooks in the right places to call the hibernate suspend and resume routines, so that we can enable hibernation with a HIBERNATE option line in GENERIC and appropriate acpi.c goo. discussed on and off with deraadt@ over the past few months
2012-03-25Move cache handling routines related definitions to a dedicated header file,Miod Vallat
rather than abusing <machine/cpu.h>.
2012-03-25Only set the low order bits of CpuCacheAliasMask if it is nonzero, regressionMiod Vallat
of previous computation fix.
2012-03-24Fix fallback of uvm_map_hint() argument changes.Miod Vallat
2012-03-24Oops, forgot this file in the SGI_<model> -> SGI_IP## change.Miod Vallat
2012-03-24The various ConfigCache() functions actually return void, not int.Miod Vallat
2012-03-24Rename the various SGI_xxx constants from machine names to their IP numbers,Miod Vallat
for IP numbers under 30 (Octane), and add a few interesting ones. No functional change, except making my life easier for upcoming work.
2012-03-24Add a few trivial routines to get mips64r2 specific config registers. Not usedMiod Vallat
by anything yet, but has been lying in one of my trees for too long.
2012-03-24Missed a reference to the u_stats member when struct pstats was removedPhilip Guenthe
from struct user. Nothing left to zero-out here so the line goes. pointed out by deraaadt@
2012-03-23Make rusage totals, itimers, and profile settings per-process insteadPhilip Guenthe
of per-rthread. Handling of per-thread tick and runtime counters inspired by how FreeBSD does it. ok kettenis@
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