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AgeCommit message (Collapse)Author
2007-05-27Always use XKPHYS addresses to perform cache operations now, for consistency.Miod Vallat
2007-05-27Use the direct maps (cached on uncached) for bus_space mappings.Artur Grabowski
jason@ ok
2007-05-27- Redo the way we set up the direct map. Map the first 4GB of itArtur Grabowski
in locore so that we can use the direct map in pmap_bootstrap when setting up the initial page tables. - Introduce a second direct map (I love large address spaces) with uncached pages. jason@ ok
2007-05-27fix another use of MAXNR for rijndaelTed Unangst
2007-05-27back out bio, breaks dlg's sparc64 v215Todd T. Fries
prompted by/ok dlg@ deraadt@
2007-05-27When deciding whether to allocate a bounce buffer, we need one ifTom Cosgrove
we are going to read exactly at 1 MB (i.e. fix an off-by-one that is already correct in the amd64 version of this file). ok toby@
2007-05-26last arch specific GENERIC with bio, remove itTodd T. Fries
ok drahn@
2007-05-26Move cpu_info/curcpu to be mapped by the %fs segment. Extra input andTobias Weingartner
debugging by tom@, art@, kettenis@, and others. Testing by many others. ok art@, kettenis@, tom@
2007-05-26Remove nbuf count (was missed by pedro)Dale Rahn
2007-05-26tht worksDavid Gwynne
2007-05-26missed this, remove bio here for move to sys/conf/GENERICTodd T. Fries
ok drahn@
2007-05-26Dynamic buffer cache. Initial diff from mickey@, okay art@ beck@ toby@Pedro Martelletto
deraadt@ dlg@.
2007-05-26prodded by marco, enable bio everywhereTodd T. Fries
grudgingly ok deraadt@
2007-05-26Add re(4). From brad at comstyle dot com.Mark Kettenis
2007-05-26tyopsMiod Vallat
2007-05-26If booted from ADPT,2940U2B, root is on scsi.Dale Rahn
2007-05-26More comment typos from Diego Casati. Including winners like funtion, allmost,Kenneth R Westerback
oustside, seqencer, toghether, nessissary, etc.
2007-05-25"interupt" -> "interrupt" in various comments. Mostly from Diego Casati.Kenneth R Westerback
2007-05-25Edge cases can trigger a TLB miss exception instead of an invalid TLBMiod Vallat
exception on early R5000 revisions. Despite this bug being supposedly fixed in R5000 revision 2 onwards, it nevertheless occurs quite frequently on matthieu's revision 2.1 R5000. Servicing the TLB miss exception would cause a duplicate TLB to be inserted, which causes the processor operation to become unpredictable (but lethal to the kernel, ten times out of nine). More details about the problem can be found in: http://www.linux-mips.org/archives/linux-mips/2000-02/msg00040.html We work around the issue by checking for an existing TLB entry, and handling this as an invalid TLB exception (as it was intended to be), in this case. Unfortunately this causes a measurable 1% slowdown on ``safe'' processors, so we'll work on providing different tlb handler flavours in the near future to recover from this.
2007-05-25Define rw_cas. Trivially simple on amd64 with atomic_cas_ul.Artur Grabowski
miod@ ok
2007-05-25Unifdef TLB_TRACE and TLBTRACE, no functional change.Miod Vallat
2007-05-25"boundries" -> "boundaries" in various comments. Started by Diego Casati.Kenneth R Westerback
2007-05-25'Proto type' -> 'Prototype' when discussing functions in comments.Kenneth R Westerback
Inspired by similar diffs from Diego Casati in other files.
2007-05-25Comment typos and tidying. From Diego Casati.Kenneth R Westerback
2007-05-25Change the old slow and complicated TLB shootdown code to new, fast andArtur Grabowski
simple. This is basically the same code as on i386 and basically the same performance improvements. This change also includes code to delay the freeing of ptps until they have been properly shot. in snaps for a week, no problems reported.
2007-05-25Replace the overdesigned and overcomplicated tlb shootdown code withArtur Grabowski
very simple and dumb fast tlb IPI handlers that have in the order of the same amount of instructions as the old code had function calls. All TLB shootdowns are reorganized so that we always shoot the, without looking at PG_U and when we're shooting a range (primarily in pmap_remove), we shoot the range when there are 32 or less pages in it, otherwise we just nuke the whole TLB (this might need tweaking if someone is interested in micro-optimization). The IPIs are not handled through the normal interrupt vectoring code, they are not blockable and they only shoot one page or a range of pages or the whole tlb. This gives a 15% reduction in system time on my dual-core laptop during a kernel compile and an 18% reduction in real time on a quad machine doing bulk ports build. Tested by many, in snaps for a week, no slowdowns reported (although not everyone is seeing such huge wins).
2007-05-25rename cpu_dumpconf() to dumpconf(); no need to be different from other ↵Theo de Raadt
architectures
2007-05-23Add code to spin up secondary cpu's; still work in progress.Mark Kettenis
prompted by deraadt@ a few times already.
2007-05-23Print real/available memory in MB as well as bytes in dmesg, and unifyPeter Valchev
architectures to print it the same way. ok henning, miod; i386 part from tom
2007-05-23Add hack to prevent switching to serial console on four-digit B/C/J classMark Kettenis
workstations. This makes these machines actually boot. ok miod@
2007-05-23Enable elroy(4).Mark Kettenis
2007-05-23Add proper bus_space_vaddr() implementation.Mark Kettenis
ok miod@
2007-05-23timecounter support (e.g. soekris net4501); ok grange@Markus Friedl
2007-05-22Add pciide(4) and things that attach to it.Mark Kettenis
2007-05-22Add elory(4).Mark Kettenis
2007-05-22Add option HP8700_CPU.Mark Kettenis
2007-05-22Hook up astro(4).Mark Kettenis
2007-05-22protect more variables from existing outside of locore, should fixMartin Reindl
cpuinfo breakage (but my make build is still running) ok gwk@
2007-05-22enable uts(4) - USB touchscreen supportRobert Nagy
2007-05-21Add support for 8700/pcxw2 cpu.Mark Kettenis
2007-05-21Ask firmware for reset before trying ourselves; needed for four-digit b/c/jMark Kettenis
workstations. tested by otto@, krw@; ok deraadt@
2007-05-21Import code to support the Elroy chip from hppa64 and make it actually work.Mark Kettenis
Still a bit of a hack, but it makes the onboard devices work.
2007-05-21Implement deep interrupt swizzling by mapping all four PCI interrupt pinsMark Kettenis
for PCI-PCI bridges and passing the mapping to the attached bus device. MD code can use these when mapping PCI device interrupts. This diff adds such code for amd64 and i386. This fixes interrupt mapping for devices that sit behind two PCI-PCI bridges where the firmware only provides a mapping for the first PCI-PCI bridge. tested by sturm@, krw@, and a few others, ok deraadt@
2007-05-21Make iommu_dvmamap_unload cleanup properly.Mark Kettenis
2007-05-21Add msk(4).Mark Kettenis
2007-05-21Initial stab at a driver for the Astro chip. Mostly IOMMU code to handleMark Kettenis
coherent DMA.
2007-05-21timecounters for armish.Dale Rahn
2007-05-21Switch pcfiic to rwlock.Jonathan Gray
ok dlg@ kettenis@
2007-05-20lockmgr -> rwlock for piic(4), kiic(4) and smu(4);Thordur I. Bjornsson
smu(4) tested by kettenis@, ok krw@
2007-05-20Fix KERNBASE, so that profiling kernels initialize (but profiling is brokenMiod Vallat
at the moment).