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OK deraadt@
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and will report the link being down too aggressively. Better to always report
the link as up - these systems and boards are single media only so it won't
harm much.
Unbreaks dhcp in the installer on these interfaces; found the hard way by
sebastia@
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stop abusing another field, and will be used by more routines RSN.
No functional change.
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make future maintainance easier.
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controller. In this mode, access to physical memory are not allowed to
bypass the cache, and this allows the memory subsystem to run faster.
Of course, some device drivers will require uncached memory access (e.g.
for proper HPC DMA descriptor operation).
New ip22-specific functions to switch between `fast mode' and `slow mode'
are introduced.
hpc(4) now provides read and write routines to fetch a dma descriptor from
uncached memory into a local copy, and update it from said modified copy.
On systems without the ECC MC, these will do nothing and operation will
continue to access the uncached memory directly. On systems with the ECC MC,
they will perform a copy, and the writeback will be done in slow mode.
bus_dmamem_map() requests for DMA memory with BUS_DMA_COHERENT set in flags,
which would return uncached memory, will now always fail on systems with
the ECC memory controller. Drivers which really need uncached memory, and
are aware of this particular setup, will now pass
BUS_DMA_COHERENT | BUS_DMA_BUS1, which will let the request succeed.
sq(4) will use all of the above to work mostly unmodified on ECC MC systems
in fast mode.
Finally, fast mode is enabled after autoconf.
Tested on IP22 and IP28.
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controller or not, and store this in a global variable. This is better than
checking for the IP number everytime, especially since, according to IRIX
header files, not all IP26 use the ECC memory controller (not that it matters
much for us since we do not run on them yet)
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From Matt Dainty. ok kettenis@
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onboard devices need only attach to hpc0 instead of hpc?.
While there, remove hpc1 and hpc2 attachment from IP28 configurations, as these
can not exist on Indigo2 systems.
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speculative execution, while in kernel mode, attempting to access bogus
physical address through CKSEG[01] or XKPHYS. Surprisingly enough, an IP28
system can boot multiuser without triggering any such error; they will only
show up if there is a lot of I/O (and thus, context switching).
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frame buffer has been removed, but which keyboard is left plugged in.
The PROM will select a `keyboard input, serial output' console, which was
being recognized as glass console by the kernel. The kernel would then
reset the serial chip at zstty attach time, while still using the PROM
output routines at this point, and hang.
Fix this by paying attention to split input/output setups and always falling
back to serial console in this case.
ok kettenis@
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ECC checking disabled, which allows the existing Indigo2 drivers to run
unmodified.
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as it was done for i386 some time ago; update the comment in the
i386 code to reflect reality. this helps machines with plenty of
memory regions set up by the bios. ok kettenis, jsg
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from a (non-compiling) diff from Brad.
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struct to know if there are multicast entries, instead of counting the
number of entries in the list. No functional change. From brad.
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the dma_constraint range. This allows the xbridge(4) bus_dma_tag_t to use the
generic routines instead of rolling its own, now that the ATE code has been
removed.
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IP22 family. This is just the bridge so far, as the underlying pci drivers
will need some changes to work (dc(4) does not work correctly yet, and tl(4)
needs to be bus_dma'ified).
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recognizing a GIO device or an id-less frame buffer in a GIO slot.
Turns out that GIO32 devices (at least those with a 32-bit ID register, but
likely all of them) do NOT like accesses to the minimal GIO register area
NOT done on 32-bit boundaries. While frame buffers won't mind, especially
if their slots are pipelined.
This makes it a lot easier to tell them apart.
While there, split gio_intr_establish() into gio_intr_map(), which will return
a logical interrupt number out of a GIO slot number, and gio_intr_establish(),
which will now expect a logical interrupt number, instead of a logical slot
number. These two functions are still unused, but upcoming changes depend on
this work. (Yes, I'm too lazy to make two commits for this tonite)
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Previous change was a tad too optimistic. This repairs E++ and GIO SCSI board
operation.
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Note that this would only affect 4KB page size IP22 kernels, which is not the
default IP22 configuration, and which noone not out of his or her mind would do.
In other words: this is a correctness fix with no impact on Real Life (c)(R)TM
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GIO frame buffer drivers do.
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is inverted on Indigo, this just means that Indigo does not use the same
values as the later models. It does not mean that the Indigo is using wrong
values, which is how I first read this. In reality, Indigo systems use the
expected values of these signals being active low, while later designs
use active high signals.
So yes, some systems have inverted values - but the ones which need
compensating are not those I thought.
Change the logic to do TRT, but keep the device flags check, to be able to
force the other behaviour if the kernel guesses wrongly. Tested on Indigo,
Indy and Indigo 2.
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byte accesses to the ID register; instead of interpreting this is as a lack
of hardware, reconize this as a valid GIO device (if the `has a 32-bit ID'
bit is set, that is).
This allows GIO Impact boards, which use a 32-bit ID, to be recognized
correctly, and to work as a console device.
Commited from an Indigo2 with glass console on the single-board Impact
(MG10) board which arrived in the mail today. Would have been done even
earlier, had I not forgotten to connect the extra power supply cable to
the Impact GIO backplane...
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consistency. Will be necessary shortly.
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IP22 kernels. Oops.
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time; not only do we need to match the graphics console address, but cn_tab
needs to point to wsdisplay, too.
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allows probes to fault and correctly recover.
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memory allocation pattern, exposing aliasing bugs in the mips64 pmap, on
kernels where virtual aliasing may happen (that is, IP32 kernels on R5000,
R10000 and R12000 O2).
Fix these (or at least, sweep them better under the rug) by:
- always flush caches in pmap_copy_page() and pmap_zero_page(), if the
destination page is mapped uncached.
- when removing a mapping of a managed page which has been forced uncached
due to virtual aliasing conflict, map it back cached as soon as the
remaining mappings are non conflicting.
- writeback, instead of simply invalidating, pool pages and page table
pages, upon release, for there might be stale data in the cache.
While these, apply more paranoia and only perform cache operations on pages
which have been mapped with the cache enabled.
Initially reported by mikeb@ on an R12k O2 (that will teach me to use an
RM7000-powered O2, without virtual aliasing, to test IP32 kernels).
Verified on an R5k O2, as well as a custom IP30 kernel with page size
forced to 4KB (to introduce virtual aliasing).
This diff tested on O2 (R5k, RM7k, R12k), IP30, IP35, as well as on
Loongson (no aliasing) by mikeb@ and I.
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in <machine/signal.h>.
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these (DEBUG) defines.
ok miod@
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with -j2.
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it by the not-normally-used sigreturn() stub in libc was changed to
use 'syscall' instruction in 5.0
ok mikeb@ jsg@
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figure out whether they attach to the onboard hpc or to an expansion slot
(or the Challenge S IO+ mezzanine). No functional change (yet)
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amount of TX empty interrupts.
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to, so make this controllable with device flags, and default to non-bogus
wiring.
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console keyboard, otherwise led update commands will never get transmitted.
Noticed by sebastia@
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boundary; this makes ddb usable again.
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regular `one key is up' events. Makes the shift, alt, ctrl, etc keys behave as
expected after the next keystroke.
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fix this by reinstating the actual probe which got removed by mistake in the
recent gio probe and console code rework.
Found the hard way by sebastia@
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Missed by miod@ in his previous commit. Now groff should build.
Okay miod@.
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ok miod@
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